Link Controller Error Repair for High-Speed Serial Links
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Solution Overview
Problem
High-speed serial links face challenges in efficiently detecting and repairing intermittent errors, which can lead to undetected serious errors and silent data corruption due to limited error handling capacity and inability to identify individual faulty lanes in real-time.
Innovation Solution
A method and system that includes a link controller to detect errors, map out individual lanes, retry transmissions, retrain links, reduce data transmission frequency, and deactivate faulty lanes to minimize intermittent errors, utilizing cyclic redundancy checks (CRC) for error detection and tracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional error handling is used, then the system can operate with simple error detection, but intermittent errors accumulate leading to silent data corruption
Solution Approach 1:
The patent segments the serial link into individual lanes and further segments error analysis into specific error types (CRC errors, training errors, data errors). This segmentation allows the system to identify and repair intermittent errors on specific lanes without affecting the entire link, preventing error accumulation and silent data corruption while maintaining overall system reliability.
Solution Approach 2:
The patent implements a feedback mechanism where the link controller continuously monitors error conditions on each lane and automatically invokes repair mechanisms (retry, retrain, map out, deactivate) when error thresholds are exceeded. This closed-loop feedback system ensures intermittent errors are detected and corrected before they can cause silent data corruption, resolving the contradiction between simple error handling and comprehensive error detection.
2Reliability
If the link controller monitors all errors continuously, then intermittent errors can be detected early, but the error analysis engine capacity is exceeded
Solution Approach 1:
The patent applies local quality by focusing error analysis on specific lanes and specific error types rather than analyzing all errors uniformly across the entire link. The link controller monitors each lane independently and applies repair mechanisms only where needed, reducing the overall error analysis capacity requirements while maintaining reliable intermittent error detection through targeted monitoring of critical parameters.
Solution Approach 2:
The patent implements partial action by monitoring error conditions up to defined thresholds rather than continuously analyzing every error in detail. The link controller counts errors and only invokes complex repair mechanisms when thresholds are exceeded, allowing most normal variations to pass without full analysis while still detecting intermittent errors that exceed acceptable limits.
3Reliability
If repair mechanisms are invoked immediately upon error detection, then transmission errors are corrected quickly, but system productivity decreases due to frequent retries and retraining
Solution Approach 1:
The patent implements dynamic error handling where the link controller adapts its response based on the current error conditions and lane status. Rather than immediately invoking the most aggressive repair mechanism, the system dynamically selects from a hierarchy of repair actions (retry, retrain, map out, deactivate) based on the specific error pattern detected, allowing normal transmissions to proceed uninterrupted while quickly correcting intermittent errors when they occur.
Solution Approach 2:
The patent applies preliminary action by establishing error thresholds and repair hierarchies in advance. The link controller is pre-configured with the sequence of repair mechanisms to invoke based on error conditions, allowing it to respond to intermittent errors with pre-planned actions that minimize disruption. This preliminary preparation enables quick error correction without ad-hoc decision-making that would reduce productivity.
Data Source
AI summary
A method and system for repairing high speed serial links is provided. The system includes a first electronic components, connected to at least a second electronic component via at least one link. At least one of the first or second electronic components has a link controller. The link controller is configured to repair serial links by detecting a link error and mapping out individual lanes of a link where the link error is detected. The link controller resumes operation, i.e., transmission of data and continues to monitor the lanes for errors. If and when additional link errors occur, the link controller identifies the lanes in which the link error occurs and deactivates those lanes. The deactivated lane(s) can not be used in further transmissions which, in turn, reduces the occurrence of intermittent link errors.