Protocol-Aware Link Equalization Tester for High-Speed Channels
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Solution Overview
Problem
Traditional testing equipment for high-speed communication channels is inadequate, as it lacks protocol awareness and cannot perform comprehensive physical layer testing, particularly for protocols like SAS and SATA, leading to inefficient error detection and link equalization.
Innovation Solution
A protocol-aware Error Ratio Tester is developed, combining a General Purpose Platform for protocol awareness with an Analog Front End for signal generation and error detection, enabling real-time control of both protocol and electrical characteristics, and supporting dynamic link equalization for protocols like PCI Express 3.0.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional BERT is used for physical layer testing, then bit error detection is achieved, but protocol awareness and packet-level error counting are lost
Solution Approach 1:
The patent merges a traditional BERT with a protocol exerciser into a single integrated device. The BERT portion handles bit error detection while the protocol exerciser portion provides protocol awareness and packet-level error counting. This combination allows the device to simultaneously perform functions that were previously separated, resolving the contradiction between bit error detection capability and protocol awareness.
Solution Approach 2:
The integrated device is designed to perform multiple functions: it can operate as a traditional BERT for bit error detection, as a protocol exerciser for protocol-aware testing, and as a loopback device. This multi-functionality allows a single device to replace multiple separate tools, providing both bit-level and protocol-level testing capabilities without requiring separate equipment.
2Adaptability or versatility
If multiple separate test equipment are used, then comprehensive testing capability is achieved, but device complexity and cost increase
Solution Approach 1:
The patent combines multiple separate test equipment (BERT and protocol exerciser) into a single integrated device with a unified user interface. This merging eliminates the need for complex equipment configurations and coordination between multiple tools, while maintaining comprehensive testing capability through the combined functionalities of the integrated components.
Solution Approach 2:
The single integrated device is designed to be universal, capable of performing both traditional BERT functions and protocol-aware testing functions. This universality allows it to replace multiple specialized tools, reducing device complexity and easing operation while maintaining comprehensive adaptability for different testing scenarios.
3Loss of information
If protocol exerciser is used separately, then protocol awareness is achieved, but real-time electrical characteristic control is limited
Solution Approach 1:
The patent merges the protocol exerciser with the BERT in a single device, enabling simultaneous protocol-aware operation and real-time electrical characteristic control. The unified architecture allows the device to exercise protocols while maintaining direct control over electrical parameters, eliminating the operational limitations of using separate equipment.
Data Source
AI summary
A method and an apparatus for performing link equalization testing via a physical layer test and measurement system. The system includes a protocol aware test apparatus for transmitting testing data, a device under test for receiving the transmitted testing data, and an oscilloscope for receiving an output waveform from the device under test. The protocol aware test apparatus selects a first of a plurality of preset values, sends an equalization signal from the protocol aware test apparatus to the device under test, and changes a speed of communication to a predetermined speed and sends a compliance pattern to the device under test after placing the device under test in a loopback mode. A waveform output from the device under test is captured by the oscilloscope, and is analyzed to determine compliance of the device under test with a predetermined link equalization speed in accordance with a predetermined protocol.