Link Initialization Memory Mapping for Low-Overhead I/O Setup
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Solution Overview
Problem
Current server access to Storage Area Networks (SAN) storage using asynchronous I/O access methods faces unacceptable processor overhead due to varying access times and protocol overhead, especially with technologies like Fibre Channel, making synchronous I/O access inefficient.
Innovation Solution
Utilize system memory to store initialization data for devices on a link by initializing a memory area in the system memory of one device and mapping a bus address to facilitate communication between devices, reducing dependency on hardware-provided registers and optimizing the initialization exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If asynchronous I/O access methods are used for SAN storage, then processor overhead is reduced, but access times increase and become unacceptable for synchronous operations
Solution Approach 1:
The patent introduces a dedicated initialization data structure and control mechanism that acts as an intermediary between the host and storage controller. This intermediary framework enables synchronous I/O operations by pre-establishing communication parameters and authentication data, allowing the system to maintain low processor overhead while achieving acceptable access times through optimized initialization sequences.
2Loss of time
If synchronous I/O access methods are used for SAN storage, then access latency is minimized, but processor overhead increases and becomes unacceptable for large multi-processing servers
Solution Approach 1:
The patent implements preliminary action by pre-initializing communication parameters, authentication data, and control structures before actual I/O operations begin. The host and storage controller exchange and store initialization data in advance, including authentication credentials and communication protocols, so that when synchronous I/O operations are needed, the processor does not need to perform time-consuming setup procedures, thus reducing overhead while maintaining low latency.
3Ease of operation
If hardware registers are used for initialization data exchange, then initialization can be performed, but the number of exchanges required increases and hardware limitations are imposed
Solution Approach 1:
The patent applies the copying principle by creating software-based data structures that replicate the functionality of hardware registers. Instead of relying on limited hardware registers, the system uses memory-resident initialization data structures that can be freely expanded and modified. This copying approach eliminates hardware limitations and reduces the number of exchange steps by allowing direct memory access and more efficient data organization.
4Ease of operation
If hardware registers are used for storing initialization data, then data exchange is possible, but expandability and flexibility are limited by hardware constraints
Solution Approach 1:
The patent substitutes the mechanical hardware register system with a software-based memory structure. The initialization data is stored in system memory rather than hardware registers, and bus address mappings are used to access this memory. This substitution provides unlimited expandability, as memory capacity can be increased without changing hardware architecture, and offers greater flexibility in data organization and access patterns.
Data Source
AI summary
Provided are a computer program product, system, and method for using system memory to store initialization data for initialization of devices on a link. A link initialization memory area is initialized in a system memory of the first device. A bus address in a bus interface is provided that maps to the link initialization memory area. A first device writes first initialization data to the bus address to cause the first initialization data to be written to the link initialization memory area. A second device writes second initialization data over the bus interface to the bus address to cause the second initialization data to be written to the link initialization memory area. The first device and the second device communicate Input/Output (I/O) requests over the link in response to the writing of the first initialization data and the second initialization data to the link initialization memory area.