Link Interface Combining Write Transactions for Bandwidth Conservation
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Solution Overview
Problem
In processors with multiple dies, the limited link bandwidth between processor dies is a bottleneck due to the need to transmit both control information and data over the same physical wires, leading to inefficiencies and potential oversubscription of the link.
Innovation Solution
The solution involves combining fragments of large write transactions that target sequential memory addresses into a single combined write transaction, which is then packed into a command flit, thereby reducing the number of command flits and conserving link bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write transactions are fragmented and transmitted separately over the link, then each transaction can be processed individually, but the number of command flits increases and link bandwidth is consumed inefficiently
Solution Approach 1:
The patent combines multiple fragmented write transactions into a single combined write transaction when they target sequential memory addresses. This merging reduces the number of command flits transmitted over the link, conserving link bandwidth while maintaining complete transaction processing. The combination is achieved by detecting sequential address patterns and consolidating multiple transactions into one with an expanded address range.
2Device complexity
If the same link is used for both control information and data transmission, then wire count is reduced, but bandwidth is limited and oversubscription occurs
Solution Approach 1:
The patent merges multiple write transactions into a single combined transaction, reducing the number of command flits that need to be transmitted. This consolidation increases effective link bandwidth availability by reducing overhead and preventing oversubscription, while maintaining the unified link structure for control and data transmission.
3Quantity of substance
If multiple command flits are transmitted for large writes, then transaction data can be transmitted, but latency increases and link bandwidth is wasted on overhead
Solution Approach 1:
The patent combines multiple write transactions into a single command flit by expanding the address field to cover the full range of sequential addresses. This merging reduces the number of command flits transmitted, thereby reducing latency and eliminating overhead from multiple separate transactions while maintaining complete data transmission.
4Productivity
If write transactions target sequential memory addresses, then memory locality is improved, but multiple separate transactions increase link overhead
Solution Approach 1:
The patent detects when write transactions target sequential memory addresses and combines them into a single transaction with an expanded address range. This maintains the benefits of sequential memory access patterns while eliminating the link overhead associated with multiple separate transactions, thereby improving overall system efficiency.
Data Source
AI summary
A system for combining write transactions of a large write includes a processor including at least a first die and a second die, and a link coupling the first die and the second die. When a link interface on one die transmits packets to the other die over the link, the link interface identifies, from a queue containing a plurality of write transactions, two or more write transactions in the queue that are candidates for combination based on one or more attributes of each write transaction. The link interface determines whether two or more candidate write transactions are combinable based on a set of conditions. When two or more candidate write transaction are combinable, the link interface combines the candidate write transactions into a single combined write transaction and transmits the combined write transaction. A link interface on the receiving die decodes the combined write transaction and iteratively regenerates the individual write transactions using control information in the combined write transaction.