Link State Machine Transition Sub-States for AS Architecture
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Solution Overview
Problem
Current PCI standards are nearing their bandwidth limits and may not meet the increasing demands of future PC systems, necessitating a more efficient interconnect solution like PCI Express with Advanced Switching architecture for scalable and high-speed communication.
Innovation Solution
The implementation of the Advanced Switching (AS) architecture over PCI Express physical and data link layers, utilizing packet-based transaction layer protocols for flexible topologies, congestion management, and fail-over mechanisms, along with the introduction of a new data-link layer state (DL_Protected) to enhance robustness and high availability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If PCI standards are used, then compatibility with existing systems is maintained, but bandwidth capacity is limited and cannot meet future demands
Solution Approach 1:
The PCI Express architecture segments the traditional parallel PCI bus into multiple independent serial lanes, each capable of operating at high speeds. This segmentation allows the system to achieve higher aggregate bandwidth by combining multiple lanes while maintaining compatibility with existing PCI standards through a bridge device that translates between the old and new architectures.
Solution Approach 2:
The patent replaces the mechanical parallel bus architecture of PCI with an electrical serial communication system. This substitution enables higher bandwidth by using differential signaling and serialization techniques, while the PCI Express to PCI bridge provides mechanical and electrical compatibility with existing PCI devices, resolving the contradiction between improved bandwidth and architecture complexity.
2Productivity
If Advanced Switching architecture is implemented, then scalable high-speed communication is achieved, but link state management complexity increases
Solution Approach 1:
The link state machine implements preliminary actions by pre-defining all possible link states (DL_Inactive, DL_Init, DL_Protected, DL_Active) and their transition conditions. This allows the system to automatically manage link establishment and state transitions without complex runtime decision-making, enabling high-speed communication while keeping state management tractable through exhaustive pre-planning of state transitions.
Solution Approach 2:
The DL_Protected link state acts as an intermediary state between DL_Init and DL_Active, providing a buffer that manages the complexity of link activation. This intermediate state allows for protected transitions and coordination between link partners, simplifying the overall state management by breaking down the complex transition into manageable steps while enabling high-speed communication in the final DL_Active state.
3Reliability
If link state transitions are made directly without intermediate states, then transition speed is faster, but reliability and robustness decrease
Solution Approach 1:
The DL_Protected link state serves as a cushioning intermediate state that absorbs and manages the complexity of transitions between DL_Init and DL_Active. This state provides a buffer that ensures reliable transitions by handling coordination and acknowledgment exchanges, while the overall transition time is minimized through efficient state machine design that quickly progresses through the protected state once conditions are met.
Data Source
AI summary
A link state machine for the Advanced Switching (AS) Architecture includes added transition sub-states. Transition events typically handled in AS link states are handled in the transition sub-states. Separating the transition events and flow from the link states into smaller transition sub-states may make the AS link machine easier to manage and facilitate debugging efforts.


