Link Table Access Control for Multi-Mode RRAM Security Parameters

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Solution Overview

Problem

Existing resistive-switching memory technologies lack efficient methods for secure data storage and access control, particularly in secure microcontrollers, leading to vulnerabilities in data integrity and unauthorized access.

Innovation Solution

A secure microcontroller with a two-terminal non-volatile memory array that operates in different modes (OTP, MTP, PUF) and discriminates among data access requests, utilizing a link table for characterization and access control, and leveraging stochastic resistive switching devices for secure data generation and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If resistive-switching memory is used for secure data storage, then data integrity and security are improved, but access control complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidaccess control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory array is divided into multiple independently controllable banks, each with its own access control logic. This segmentation allows different security policies to be applied to different data regions, improving data integrity through targeted protection while managing complexity by localizing access control functions to specific memory segments rather than implementing a monolithic access control system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An access control module is introduced as an intermediary between the processor and the resistive-switching memory array. This mediator implements security policies by validating access requests, managing encryption keys, and controlling data flow to and from the memory, thereby improving data integrity while abstracting the complexity of secure access control from the main processing logic.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If multiple memory modes (OTP, MTP, PUF) are implemented, then versatility is improved, but device complexity increases

Engineering Contradiction:
Improvememory mode versatilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The resistive-switching memory array is designed to support multiple operational modes (OTP, MTP, and PUF) within a single unified structure. By implementing mode selection logic and configuration registers that can switch the memory array between different operational states, the system achieves versatile functionality without requiring separate physical memory structures for each mode, thereby improving adaptability while controlling device complexity through shared hardware resources.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory device incorporates dynamic mode switching capability where the operational mode can be changed during device lifetime through configuration registers or control signals. This dynamic reconfigurability allows the same physical memory array to adapt between OTP, MTP, and PUF modes based on security requirements, improving versatility while avoiding the complexity of multiple static memory structures by using a single dynamic system.

Inventive Principle:
Principle #15Dynamics

3Reliability

If stochastic characteristics are used for random number generation, then security is improved, but manufacturing precision requirements increase

Engineering Contradiction:
ImprovesecurityVSAvoidmanufacturing precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The inherent manufacturing variations and stochastic characteristics of resistive-switching memory cells, which traditionally represent yield challenges and precision defects, are deliberately exploited to generate high-entropy random numbers for security applications. By converting these manufacturing imperfections into a security feature through PUF (Physical Unclonable Function) mechanisms, the system transforms what was previously a harmful factor (manufacturing variability) into a beneficial security asset, improving cryptographic key generation while the manufacturing precision requirements remain at standard semiconductor levels.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances data integrity and security by allowing differentiated access control and secure data storage, reducing overhead and mitigating illicit access through stochastic data generation and resistive switching device architecture.

Implementation Method 1

two-terminal non-volatile memory that stores a parameter for a security application at a plurality of two-terminal memory cells

Methodology Applied
Scientific EffectResistive switching: Electrical Resistance

Data Source

PatentUS12499260B1Link table for characterizing multi-mode CSP parameters in a secure microcontroller with unified RRAM
Publication Date: 2025.12.16 CROSSBAR INC
  • US12499260B1 patent drawing
  • US12499260B1 patent drawing
  • US12499260B1 patent drawing

AI summary

A secure microcontroller for a secure data storage device can utilize two-terminal non-volatile memory for enhanced security and component density. The secure microcontroller can operate portions of the two-terminal memory in different modes, such as OTP, rewritable or MTP, physical unclonable function PUF and so forth, and discriminate among data access requests according to data characterizations defined for data parameters stored at the secure storage device. A link table maintained by the secure microcontroller can correlate these characterizations with distinct data parameters. In some embodiments of the present disclosure, the secure microcontroller can also maintain predefined characterizations that are common to many data sets. In these embodiments, the link table can simply correlate many of the data sets to one of the predefined characterizations and significantly reduce the overhead involved in characterizing many distinct data parameters.