Linked Header-Payload Cache Entries to Reduce Coherency Traffic

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing cache systems in data processing systems, particularly graphics processing systems, face inefficiencies in maintaining cache coherence, leading to increased bandwidth requirements due to the need for numerous coherency transactions across multiple caches.

Innovation Solution

Implementing a cache system that maintains link information between cache entries caching associated header and payload data, reducing coherency transactions by limiting them to header cache entries and avoiding transactions for payload entries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cache coherence protocol is implemented to ensure cache coherence across multiple caches, then cache coherence is improved, but bandwidth requirements increase due to numerous coherency transactions

Engineering Contradiction:
Improvecache coherenceVSAvoidbandwidth requirements
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The cache entry is segmented into two distinct parts: a header cache entry containing metadata (tag, validity bit, etc.) and a payload cache entry containing the actual data. This segmentation allows the coherence protocol to operate selectively - coherency transactions are performed only on header cache entries to determine validity and ownership, while payload cache entries are accessed only when headers indicate they are valid and owned by the requesting cache. This eliminates unnecessary coherency transactions for payload data, reducing bandwidth consumption while maintaining cache coherence.

Inventive Principle:
Principle #1Segmentation

2Reliability

If coherency transactions are performed for all cache entries including payload entries, then cache coherence is maintained, but the number of transactions increases

Engineering Contradiction:
Improvecache coherenceVSAvoidnumber of transactions
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The coherence management functionality is extracted from the payload cache entries and concentrated in the header cache entries. Headers contain all necessary coherence information (validity bits, ownership indicators, tag information) and serve as the sole target for coherency transactions. Payload entries are extracted from the coherence management scope entirely - they are treated as passive data storage that only becomes accessible when header validation succeeds. This extraction reduces the number of coherency transactions from potentially every cache access to only header validation operations.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If traditional cache operations are used without link information, then implementation is simpler, but bandwidth requirements are higher

Engineering Contradiction:
Improveimplementation complexityVSAvoidbandwidth requirements
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The header and payload cache entries are merged into a unified cache entry structure with a defined relationship. The header portion contains coherence metadata that directly controls access to the payload portion. This merging creates an integrated coherence management system where the header acts as a gatekeeper for its associated payload, enabling the system to track and manage coherence state for related data together. The link between header and payload within each cache entry allows the system to reduce bandwidth by only performing coherency operations on headers while automatically managing payload coherence through the established relationship.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12443538B2Cache systems
Publication Date: 2025.10.14 ARM LTD
  • US12443538B2 patent drawing
  • US12443538B2 patent drawing
  • US12443538B2 patent drawing

AI summary

A method of operating a cache system is disclosed. Information indicating a link between associated header and payload cache entries is maintained. The link information may be used to reduce cache coherency traffic.