Linked Memory Lists for Parallel Data Buffering
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Solution Overview
Problem
In data switching networks, the existing queue management systems incur latency due to the sequential processing of tokens, which limits throughput and increases latency, especially in high-speed routers, as they require frequent access to memory for each token, leading to bottlenecks and resource inefficiencies.
Innovation Solution
Implementing a buffer memory management system using virtual queues with multiple linked memory lists allows for parallel enqueuing and dequeuing operations, enabling faster data transmission by linking allocated addresses across multiple memory lists, thereby reducing latency and increasing throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional sequential queue structure is used, then memory access is simple, but throughput is limited and latency increases
Solution Approach 1:
The patent divides the traditional sequential queue into multiple parallel linked lists (first linked list, second linked list, third linked list, fourth linked list). Each linked list operates independently to store and process tokens, enabling parallel token handling. This segmentation allows simultaneous enqueue and dequeue operations across multiple lists, directly increasing throughput while maintaining manageable complexity through modular list structures.
Solution Approach 2:
The patent transitions from a single-dimensional sequential queue to a multi-dimensional parallel structure. By introducing multiple linked lists that operate in parallel, the system adds a temporal and structural dimension to token processing. This dimensional expansion enables concurrent operations on multiple tokens simultaneously, resolving the throughput-latency tradeoff.
2Loss of time
If multiple parallel buffers are introduced to reduce latency, then enqueue speed increases, but resource consumption and processing power requirements increase
Solution Approach 1:
The patent segments the buffer into multiple linked lists that share common memory resources rather than requiring separate physical buffers. Each linked list can be implemented using the same memory allocation mechanisms, reducing the total memory footprint while enabling parallel operations. This segmentation approach achieves low latency without proportionally increasing resource consumption.
Solution Approach 2:
The patent creates a universal linked list structure that can serve multiple functions: storing tokens, managing queue state, and enabling parallel processing. The same linked list infrastructure handles both enqueue and dequeue operations, as well as supporting multiple queues through shared memory regions. This multi-functionality reduces the need for dedicated resources for each operation type.
3Reliability
If frequent memory access is required for each token, then queue state can be maintained, but bandwidth becomes a bottleneck
Solution Approach 1:
The patent segments token storage across multiple linked lists, allowing the system to maintain queue state information in a distributed manner. Each linked list maintains its own state pointers and can operate independently, reducing the frequency of memory accesses required for any single token while maintaining overall system reliability. This segmentation enables bandwidth-efficient state maintenance.
Solution Approach 2:
The patent introduces linked lists as intermediary structures between the queue controller and memory. These linked lists act as buffers that cache queue state information and token references, reducing the need for frequent direct memory accesses. The linked lists mediate between the need for reliable state maintenance and the requirement for high bandwidth by pre-loading and caching critical state information.
Data Source
AI summary
An apparatus and method for queuing data to a memory buffer. The method includes selecting a queue from a plurality of queues; receiving a token of data from the selected queue and requesting, by a queue module, addresses and pointers from a buffer manager for addresses allocated by the buffer manager for storing the token of data. Subsequently, a memory list is accessed by the buffer manager and addresses and pointers are generated to allocated addresses in the memory list which comprises a plurality of linked memory lists for additional address allocation. The method further includes writing into the accessed memory list the pointers for the allocated address where the pointers link together allocated addresses; and migrating to other memory lists for additional address allocations upon receipt of subsequent tokens of data from the queue; and generating additional pointers linking together the allocated addresses in the other memory lists.