Linked Storage ECC Parity for Sector Error Correction
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Solution Overview
Problem
Storage devices, such as hard disk drives and solid state drives, face limitations in correcting sector errors, and the use of Write Verify Functions can lead to performance losses due to additional resource allocation for read operations.
Innovation Solution
A computing apparatus that manages data storage by generating and using both host system and storage device error correcting code (ECC) parity data, processed with an encoder matrix to correct sector errors, thereby reducing the need for Write Verify Functions and enhancing data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Write Verify Functions are used to ensure proper data writing, then data integrity is improved, but system performance deteriorates due to additional read commands consuming resources
Solution Approach 1:
The patent applies preliminary action by generating host system ECC parity data before the write operation completes. This allows the host system to prepare error correction capabilities in advance, so that when data is read back, verification can occur more efficiently without requiring a full additional read command, thus maintaining data integrity while reducing performance impact.
Solution Approach 2:
The patent introduces ECC parity data as an intermediary element between the host system and storage device. This intermediary contains error correction information that enables verification of data integrity without requiring the storage device to execute additional read commands, thereby resolving the contradiction between reliability verification and system performance.
2Reliability
If storage devices correct more sector errors, then data reliability is improved, but device complexity increases due to additional ECC processing requirements
Solution Approach 1:
The patent applies segmentation by dividing error correction into two separate components: host system ECC parity data generated by the host, and storage device ECC parity data generated by the storage device. This segmentation allows each component to handle a portion of the error correction task, improving reliability without requiring either component to implement a complete, complex error correction system alone.
Solution Approach 2:
The patent merges the error correction capabilities of the host system and storage device by combining their respective ECC parity data. This combination enables the system to correct more sector errors than either component could handle individually, improving reliability while distributing the processing complexity across both systems rather than concentrating it in one device.
Data Source
AI summary
Systems, methods, and software are provided herein for error correction in writing and reading data to and from a data storage device. In one implementation, an encoder matrix is used to generate, for a data set, first error correcting code (ECC) parity data on a host system, and second ECC parity data for tracks on data storage device coupled to the host system. Once generated, the data storage device will store the data set and the first and second ECC parity data on storage media for the device. When a read is required, the storage device will provide a first version of the data set with the first and second ECC parity data to the host system, permitting the host system to use the parity data to generate a corrected version of the data set.