Liquid Crystal Electrode Slit Layout for High-Resolution Transmittance
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Solution Overview
Problem
Increasing pixel resolution in display devices leads to difficulties in forming comb teeth of electrodes, resulting in reduced transmittance and response speed issues.
Innovation Solution
A display device design featuring a polygonal-shaped slit in the common electrode overlapping signal and scanning lines, with a semiconductor structure and insulating film, allowing for improved liquid crystal domain orientation and faster response while maintaining transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the resolution of pixels is increased, then the image clarity is improved, but it becomes difficult to form the comb teeth of the electrodes, resulting in reduced transmittance
Solution Approach 1:
The common electrode slit is designed with an asymmetric polygonal shape where one side is intentionally made longer than the other. This asymmetric configuration allows the slit to overlap with signal lines or scanning lines in a controlled manner, creating favorable electric field distributions that improve liquid crystal domain orientation. This resolves the contradiction by maintaining adequate transmittance through strategic overlap while supporting high-resolution pixel structures.
Solution Approach 2:
The slit structure is configured with different local characteristics - one side is longer and positioned to overlap with electrode lines, while the other side is shorter. This local differentiation creates specific electric field patterns in different regions, enabling improved liquid crystal alignment in critical areas without compromising overall transmittance, thus supporting both high resolution and adequate light transmission.
2Measurement precision
If the resolution of pixels is increased, then the image clarity is improved, but the response speed is reduced
Solution Approach 1:
The asymmetric polygonal slit configuration creates non-uniform electric field distributions that enhance the switching performance of liquid crystal molecules. By positioning the longer side to overlap with electrode lines, the design generates stronger local electric fields that accelerate liquid crystal response, thereby improving response speed while maintaining high-resolution pixel structures.
Solution Approach 2:
The slit geometry parameters (shape, orientation, side lengths) are specifically optimized to generate favorable electric field patterns. By adjusting these geometric parameters, the design achieves improved liquid crystal domain orientation and faster response times, resolving the contradiction between high resolution and response speed.
3Speed
If four liquid crystal domains of the same size are generated around two openings, then the response speed is improved, but increasing pixel resolution makes all domains equally small, resulting in reduced transmittance
Solution Approach 1:
Instead of creating four equal-sized liquid crystal domains, the design uses an asymmetric slit configuration that generates domains of different sizes. The longer side of the polygonal slit creates a larger liquid crystal domain in the region where it overlaps with electrode lines, while the shorter side creates a smaller domain. This asymmetric domain distribution maintains adequate transmittance while still achieving fast response speeds through the presence of at least one large, high-performance domain.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances response speed and transmittance by optimizing liquid crystal domain orientation and pixel electrode design, ensuring high-resolution display without compromising image clarity.
Implementation Method 1
a common electrode overlapping the pixel electrodes with an insulating film interposed between the common electrode and the pixel electrodes
Data Source
AI summary
A display device includes an array substrate, and a counter substrate facing the array substrate. The array substrate includes a plurality of signal lines arrayed in a first direction in a manner spaced apart from each other, a plurality of scanning lines arrayed in a second direction in a manner spaced apart from each other, a plurality of pixel electrodes provided to respective openings of pixels each surrounded by two adjacent signal lines and two adjacent scanning lines, a plurality of semiconductors provided to the respective pixels, and a common electrode overlapping the pixel electrodes with an insulating film interposed between the common electrode and the pixel electrodes.