Liquid Metal Package Substrate Assembly for High-Density Routing
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Solution Overview
Problem
The increasing die area and complexity of high-performance processors lead to a rise in the number of build-up layers in packaging substrates, resulting in increased manufacturing complexity, yield loss, and cost.
Innovation Solution
The use of liquid metal interconnects in a z-disaggregation approach to create a substrate assembly with a coreless patch for high-density interconnect routing, an interposer for package input/output and power connections, and a core patch to connect the coreless patch to the interposer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of build-up layers in the packaging substrate is increased to accommodate larger die area and higher signal counts, then the interconnect routing capability is improved, but the manufacturing complexity and cost increase
Solution Approach 1:
The substrate is divided into multiple separate build-up layers that can be manufactured independently and then assembled together. This segmentation allows each layer to be produced with standard manufacturing processes, avoiding the complexity of producing a single thick multi-layer substrate, while still achieving the required interconnect routing capability through stacked assembly.
2Adaptability or versatility
If the number of build-up layers in the packaging substrate is increased to accommodate larger die area and higher signal counts, then the interconnect routing capability is improved, but the yield decreases
Solution Approach 1:
By segmenting the substrate into multiple independently manufacturable build-up layers, the invention reduces the risk associated with producing a single complex multi-layer substrate. If one layer has defects, other layers can potentially be reused or replaced, improving overall yield compared to a monolithic multi-layer substrate where defects throughout the entire structure would cause complete failure.
3Ease of manufacture
If the substrate assembly uses traditional interconnect methods, then the manufacturing process is simpler, but the electrical losses increase
Solution Approach 1:
The invention employs composite interconnect structures combining different materials and configurations within the build-up layers. This includes using optimized conductor traces, vias, and interlayer connections that reduce electrical resistance and signal loss while maintaining manufacturability. The composite approach allows balancing electrical performance requirements with manufacturing constraints.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the overall z-height of the substrate assembly, minimizes electrical losses, and improves yield by allowing for easier replacement of defective components without reflow, while maintaining high interconnect routing capability.
Implementation Method 1
liquid metal interconnects in a z-disaggregation approach to create a substrate assembly... minimizes electrical losses
Data Source
AI summary
A z-disaggregated integrated circuit package substrate assembly comprises a first substrate component (a coreless patch), a second substrate component (a core patch), and a third substrate component (an interposer). The coreless patch comprises thinner dielectric layers and higher density routing and can comprise an embedded bridge to allow for communication between integrated circuit dies attached to the coreless patch. The core layer acts as a middle layer interconnect between the coreless patch and the interposer and comprises liquid metal interconnects to connect the core patch physically and electrically to the coreless patch and the interposer. Core patch through holes comprise liquid metal plugs. Some through holes can be surrounded by and coaxially aligned with magnetic plugs to provide improved power signal delivery. The interposer comprises thicker dielectric layers and lower density routing. The substrate assembly can reduce cost and provide improved overall yield and electrical performance relative to monolithic substrates.