Liquid State Machine Cores for Parallel Signal Processing
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Solution Overview
Problem
Conventional Turing-machine based computers face limitations in processing unpredictable and noisy real-world signals, such as speech recognition and string matching, due to high computational complexity and memory bottlenecks, which are not efficiently addressed by existing solutions like neural networks and Finite-State-Machine models.
Innovation Solution
A computing arrangement using a network of independently set liquid state machine cores that process temporal inputs in parallel, each with unique statistical properties and weighted connections, allowing for efficient recognition of learned signals without sequential memory access, enabling tasks like filtering, image recognition, and string matching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If Turing-machine based computers are used to process unpredictable real-world signals, then computational power can be increased, but computational complexity and energy consumption increase significantly
Solution Approach 1:
The patent replaces the mechanical sequential processing system of Turing machines with a parallel distributed processing system using multiple computational cores that simultaneously process data streams, fundamentally changing the computational paradigm from sequential to parallel execution
Solution Approach 2:
The patent divides the computational system into multiple independent computational cores, each capable of processing different aspects of the data stream in parallel, thereby reducing the computational burden on any single core and enabling efficient handling of complex real-world signals
2Productivity
If Turing-machine based computers process massive quantities of noisy data, then analysis capability improves, but memory access becomes a bottleneck
Solution Approach 1:
The patent merges multiple computational cores into a unified parallel processing system that shares common memory structures, allowing simultaneous data access across multiple cores without the sequential memory access bottlenecks of traditional systems
Solution Approach 2:
The patent transitions from single-dimensional sequential memory access to multi-dimensional parallel memory access by distributing data across multiple computational cores that can simultaneously access different portions of the memory space
3Power
If the number of transistors per integrated circuit increases, then computational power increases, but synchronization and reliability become difficult
Solution Approach 1:
The patent employs dynamic frequency adjustment and adaptive synchronization mechanisms that allow the system to maintain reliable operation across varying computational loads, with each core able to operate independently at optimized frequencies rather than requiring uniform synchronization of all transistors
4Productivity
If conventional computers process unpredictable real-world signals, then task completion is achieved, but energy consumption increases
Solution Approach 1:
The patent implements event-driven processing where computational cores only activate and consume energy when relevant events or data patterns are detected, rather than continuously processing all incoming data, thereby reducing overall energy consumption while maintaining task completion capability
Data Source
AI summary
A computing arrangement for identification of a current temporal input against one or more learned signals. The arrangement comprising a number of computational cores, each core comprises properties having at least some statistical independency from other of the computational, the properties being set independently of each other core, each core being able to independently produce an output indicating recognition of a previously learned signal, and at least one decision unit for receiving the produced outputs from the number of computational cores and making an identification of the current temporal input based the produced outputs.