Lithographic Mask Segmentation for Semiconductor Opening Formation
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Solution Overview
Problem
The existing semiconductor manufacturing processes require multiple critical masks for forming features with small dimensions, such as contact holes, which increases manufacturing costs due to the need for advanced mask technology and optical proximity correction, and compromises on the depth of focus (DoF) when combining different pitch patterns on a single lithographic mask.
Innovation Solution
A method that uses a main mask with a regular pattern and a selector mask to selectively define openings in a dielectric layer, allowing for the formation of openings with small dimensions without the need for multiple critical masks, thereby optimizing the depth of focus and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple critical masks are used to form features with small dimensions, then manufacturing precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent segments the mask pattern into two distinct components: a main mask providing a regular periodic pattern, and a selector mask providing sparse isolated patterns. This segmentation allows each mask to be optimized independently - the main mask for regular pitch features and the selector mask for contact holes requiring small critical dimensions. By dividing the single critical mask into two specialized masks, the invention achieves precise formation of small dimension features while reducing overall manufacturing complexity and cost.
2Adaptability or versatility
If different pitch patterns are combined on a single lithographic mask, then device functionality is improved, but depth of focus deteriorates
Solution Approach 1:
The patent applies local quality by assigning different pattern characteristics to different masks: the main mask is designed with a regular periodic pattern optimized for one pitch, while the selector mask contains isolated patterns for contact holes. Each mask can therefore be locally optimized for its specific pattern type, allowing the main mask to provide a large depth of focus for regular patterns while the selector mask addresses the specific needs of contact hole formation. This local optimization eliminates the compromise that would be required if all patterns were combined on a single mask.
3Manufacturing precision
If double exposure and double etch steps are implemented, then opening formation precision is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs preliminary action by forming the main mask pattern first, then using the selector mask to selectively define which regions will receive etching. The selector mask is applied to the main mask structure, and etching is performed only through the selected regions. This preliminary arrangement of patterns and selective definition allows precise opening formation while reducing the need for multiple complete exposure and etch cycles, thereby simplifying the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of openings with small dimensions while maintaining an optimal depth of focus without significantly increasing costs, improving throughput by eliminating the need for double exposure and double etch steps, and enabling efficient production of semiconductor devices with small pitch features.
Implementation Method 1
lithographic processes to transfer geometric patterns representing the design layout of the different features of a semiconductor device or an IC from reticles or lithographic masks to a light-sensitive chemical (known as photoresist or resist) on a surface of a semiconductor wafer or die
Data Source
AI summary
A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, forming a main mask over the dielectric layer, the main mask comprising a plurality of main mask openings arranged in a regular pattern extending over the dielectric layer, using a selector mask to select some of the plurality of main mask openings and removing portions of the dielectric layer through the selected some of the plurality of main mask openings to provide openings extending through the dielectric layer to the layer.