Lithographic Overlay Sampling via Orthogonal Field Structures
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Solution Overview
Problem
In semiconductor fabrication, existing methods face challenges in achieving accurate overlay control between alignment events while maintaining manufacturing throughput, particularly due to mask overlay variability and wafer topology distortions caused by thermal cycling, which degrade alignment structure locations and reduce accuracy.
Innovation Solution
The method involves organizing a wafer into orthogonal and continuous field structures, where a higher number of alignment structure positions are measured within orthogonal fields compared to continuous fields, allowing for enhanced overlay control and improved alignment accuracy without significantly degrading manufacturing throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the number of sampled alignment structure positions is increased to improve overlay accuracy, then manufacturing throughput is degraded
Solution Approach 1:
The patent divides the wafer into multiple discrete fields, each containing alignment structures. By organizing fields into groups and selecting representative fields for sampling, the system segments the measurement task into manageable portions. This allows accurate overlay measurement through strategic sampling of a subset of fields rather than measuring all alignment structures, thereby maintaining throughput while achieving sufficient accuracy.
Solution Approach 2:
The patent applies different sampling strategies to different field groups based on their location and importance. Orthogonal fields (along x and y axes) are sampled with higher density to capture wafer-level distortions, while other fields use reduced sampling. This local differentiation optimizes the balance between measurement accuracy and throughput by concentrating resources where they provide maximum benefit.
2Productivity
If a subset of alignment structure locations is sampled to maintain manufacturing throughput, then overlay accuracy is degraded
Solution Approach 1:
The patent performs preliminary organization of fields into groups and identifies representative fields before the actual overlay measurement. By pre-determining which fields to sample and how many alignment structures to measure in each field, the system prepares an optimized sampling plan that maintains accuracy while enabling faster throughput during production.
Solution Approach 2:
The patent introduces an intermediary computational layer that processes field selection and sampling decisions. This intermediary system determines the optimal subset of fields and alignment structures to measure, acting as a mediator between the requirement for high throughput and the need for accurate overlay measurement. The intermediary calculates which sampled locations will provide the best representation of overall wafer alignment.
3Reliability
If alignment structure locations are distorted due to wafer topology changes from thermal cycling, then overlay control is degraded
Solution Approach 1:
The patent implements feedback by measuring alignment structures at multiple field locations and using these measurements to detect and correct for wafer topology distortions. The system continuously monitors alignment structure positions across different fields and adjusts overlay control parameters based on the observed distortions, compensating for thermal cycling effects and maintaining reliable overlay control.
Solution Approach 2:
The patent recognizes that wafer topology distortions are not uniform across the wafer surface due to thermal cycling. By implementing asymmetric sampling with higher density along orthogonal fields (x and y axes) and reduced density in other regions, the system captures the non-uniform distortion patterns more effectively, improving overlay control reliability despite thermal effects.
Data Source
AI summary
Some embodiments of the present disclosure relate to a method of alignment which includes defining a plurality of fields on the face of a wafer, and organizing the plurality of fields into an orthogonal field structure and two or more continuous field structures. A first number of alignment structure positions are measured within each field of the two or more continuous field structures, and a second number of alignment structure positions are measured within each field of the orthogonal field structure, the second number being greater than the first number. The feature or layer is then aligned to the previously formed feature or layer based upon the measured alignment structure positions of the two or more continuous field structures and the orthogonal field structure.


