Lithography Alignment Mark Measurement for IC Overlay Precision

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Solution Overview

Problem

The challenge in modern lithography is to efficiently and accurately form desired patterns on integrated circuits with precise alignment, especially as miniaturization advances, leading to time-consuming and costly measurement processes that hinder throughput and overlay performance.

Innovation Solution

A method involving the measurement and analysis of alignment marks on each exposure field to determine exposure parameters and locations, allowing for real-time correction and feedback to improve pattern formation, which can be applied to both single and multi-layer substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If extensive measurement operations are performed prior to exposing the substrate to ensure accurate pattern formation and alignment, then manufacturing precision is improved, but productivity deteriorates due to time-consuming processes

Engineering Contradiction:
Improvealignment precisionVSAvoidthroughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by measuring alignment marks and determining exposure parameters before the actual exposure process. The system pre-calculates correction values based on measured alignment mark positions, allowing the exposure to proceed with predetermined correction parameters, thus reducing measurement time while maintaining precision

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by measuring the positions of alignment marks, comparing them against reference positions, calculating deviation values, and using these deviation values to correct exposure parameters. This closed-loop feedback mechanism ensures high alignment precision while minimizing measurement time through iterative correction

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If extensive measurement operations are performed prior to exposing the substrate to ensure accurate pattern formation and alignment, then manufacturing precision is improved, but loss of time increases

Engineering Contradiction:
Improvepattern accuracyVSAvoidmeasurement time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent extracts only the essential measurement information needed for correction by focusing measurement on specific alignment marks rather than进行全面 substrate characterization. The system extracts positional deviation data from alignment marks and uses only this extracted information for exposure parameter correction, significantly reducing measurement time while maintaining pattern accuracy

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes parameters by using measured alignment mark positions to dynamically adjust exposure parameters such as exposure position, exposure amount, and focal position. This parameter adaptation allows the system to achieve high pattern accuracy with minimal measurement time by only measuring what is necessary to determine the required parameter corrections

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9964866B2Method of forming integrated circuit
Publication Date: 2018.05.08 UNITED MICROELECTRONICS CORP

AI summary

A method of forming an integrated circuit includes the following steps. A substrate including a plurality of exposure fields is provided, and each of the exposure field includes a target portion and a set of alignment marks. Measure the set of alignment marks of each exposure field by a measuring system to obtain alignment data for the respective exposure field. Determine an exposure parameter corresponding to each exposure field and an exposure location on the target portion from the alignment data for the respective exposure field by a calculating system. Feedback the alignment data to a next substrate.