Digital Lithography Design File Verification for Data Volume Reduction
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Solution Overview
Problem
Conventional digital lithography methods face challenges in reducing data volume while maintaining hierarchical structural information, leading to inefficiencies in the digital lithography process due to large data transfer and loss of structural details during verification.
Innovation Solution
A method and device for verifying design files in digital lithography that apply compliance rules to detect non-orthogonal edges, non-compliant overlapping structures, and interactions between layers, allowing for verification based on thresholds, thereby optimizing data volume and maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional verification methods are used to verify design files, then verification completeness is improved, but data volume increases significantly
Solution Approach 1:
The patent extracts only the essential structural information (hierarchical structure, geometric relationships, layer associations) from the complete design file while removing redundant detailed data. This extraction approach maintains verification completeness by preserving the critical elements needed for compliance checking while significantly reducing the data volume that needs to be processed and transferred.
Solution Approach 2:
The verification process is segmented into multiple stages: first verifying hierarchical structure compliance, then geometric relationship compliance, and finally layer interaction compliance. Each stage processes only the relevant subset of design information, avoiding the need to handle the complete design file at once, thus reducing overall data transfer requirements while maintaining thorough verification.
2Speed
If hierarchical structure information is removed during verification, then data processing speed is improved, but structural integrity information is lost
Solution Approach 1:
The patent performs preliminary verification of hierarchical structure compliance before detailed geometric verification. By pre-identifying and flagging hierarchical structure elements (cells, instances, their relationships) in advance, the system prepares the data structure for efficient processing while ensuring structural integrity is maintained throughout subsequent verification stages.
Solution Approach 2:
The verification system uses a nested approach where hierarchical structure verification contains geometric relationship verification, which in turn contains layer interaction verification. Each nested level operates on progressively more detailed information while relying on the validated structure from previous levels, maintaining structural integrity throughout the verification hierarchy.
3Manufacturing precision
If complete design files are transferred for digitization, then pattern accuracy is improved, but transfer time increases
Solution Approach 1:
The patent introduces an intermediary verification process that acts as a mediator between design file creation and digitization. This intermediary stage validates compliance with minimal data transfer, identifying and correcting issues before the full design file is transferred for digitization. This ensures pattern accuracy is maintained while avoiding the time cost of transferring and re-correcting errors in the complete file.
Data Source
AI summary
A verification device for verifying a design file for digital lithography comprises a memory and a controller. The memory comprises the design file. The controller is configured to access the design file and apply one or more compliance rules to the design file to determine compliance of the design file. The compliance rules comprises at least one of detecting non-orthogonal edges within the design file, detecting non-compliant overlapping structures within the design file, and detecting a non-compliant interaction between a reference layer of the design file and a target layer of the design file. The controller is further configured to verify the design file in response to a comparison of a number of non-orthogonal edges, non-compliant overlapping structures and non-compliant interactions to a threshold.


