Lithography System Flexible Substrate Deformation Chip Arrangement

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Solution Overview

Problem

Current lithography systems require frequent changes of photomasks, leading to increased fabrication costs and reduced throughput in semiconductor processes, and the pick-and-place technique for small-sized chips results in lower processing speed and higher costs due to inefficiencies in coating and arrangement.

Innovation Solution

An image processing-based lithography system that forms a perimeter wall and applies a coating layer to target objects without photomasks, using a flexible substrate that can be deformed to change chip arrangements and a photoresist exposed to light to create a cured coating layer, enabling cost-effective and high-throughput processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If photomasks are used to form patterns on substrates, then pattern formation is achieved, but frequent photomask changes are required leading to increased fabrication cost and reduced throughput

Engineering Contradiction:
Improvepattern formationVSAvoidthroughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent uses a master mask that can be repeatedly copied onto multiple substrates through the lithography system. Instead of creating new photomasks for each pattern, the same master mask is used to generate patterns on multiple substrates sequentially, eliminating the need for frequent photomask changes and improving throughput while maintaining pattern formation capability

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The master mask serves multiple functions: it can be used repeatedly for pattern formation on different substrates, and it can be repositioned or reused across multiple lithography cycles. This multi-functional approach replaces the single-use nature of traditional photomasks, reducing fabrication costs and increasing productivity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If pick-and-place technique is applied to small-sized chips, then chip assembly is achieved, but processing speed decreases and cost increases

Engineering Contradiction:
Improvechip assemblyVSAvoidprocessing speed
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent combines multiple chips onto a single substrate in a single lithography process step, rather than assembling them individually through pick-and-place operations. By merging the chip assembly function with the lithography process, the method achieves both pattern formation and chip positioning simultaneously, dramatically improving processing speed while maintaining ease of manufacture

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary arrangement of multiple chips on the substrate before final assembly or processing. By pre-positioning chips in their final locations during the lithography step itself, the method eliminates the need for subsequent pick-and-place operations, thereby increasing processing speed without compromising assembly quality

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach eliminates the need for photomask changes, reduces fabrication costs, and enhances processing speed and throughput by allowing for flexible substrate deformation and efficient chip arrangement, resulting in a cost-effective and productive semiconductor process.

Implementation Method 1

forming a first coating layer on the surfaces of the plurality of chips by selectively exposing the photoresist to light. The first coating layer is a cured photoresist.

Methodology Applied
Scientific EffectPhotopolymerisation: Photopolymerisation

Data Source

PatentEP3073322B1Image processing-based lithography system and target object coating method
Publication Date: 2020.07.01 SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
  • EP3073322B1 patent drawingFigure 1
  • EP3073322B1 patent drawingFigure 2
  • EP3073322B1 patent drawingFigure 3

AI summary

A technique related with a lithography system is disclosed. The lithography system includes at least one target object disposed on a substrate, a processor configured to process an image of the target object to determine an optical pattern for a coating layer of the target object, and an exposure apparatus configured to provide light having the optical pattern determined by the processor to the substrate.