Multiple Lithography Hard Mask Pattern Formation
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Solution Overview
Problem
Current semiconductor fabrication methods face challenges in achieving sufficient uniformity control and process flexibility for forming smaller feature sizes, particularly in reducing pitch without changing photolithography technology, which limits the complexity and efficiency of IC manufacturing.
Innovation Solution
The method involves using multiple lithography processes and etching processes to form multiple cutting patterns with different etching selectivities, allowing for the reshaping of various subsets of features in the main pattern without affecting each other, and enabling flexible spacing between features through the use of distinct hard mask layers and resist layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If current photolithography technology is used to reduce pitch, then feature size decreases, but uniformity control and process flexibility become insufficient
Solution Approach 1:
The patent divides the pattern formation process into multiple lithography steps, where a first lithography process forms initial patterns and a second lithography process forms additional patterns. This segmentation allows each process to be optimized independently, maintaining manufacturing precision while achieving smaller feature sizes through combined patterning.
Solution Approach 2:
The patent introduces process dimensionality by using multiple lithography processes instead of a single process. This adds a temporal and procedural dimension to pattern formation, enabling better control over uniformity and flexibility while reducing pitch, as each lithography step can be tuned for specific requirements.
2Length of moving object
If current photolithography technology is used to reduce pitch, then feature size decreases, but process flexibility is limited
Solution Approach 1:
By segmenting the patterning into multiple lithography processes with different hard mask layers, the patent enables independent optimization of each step for specific feature requirements. This segmentation provides process flexibility to handle diverse pattern formation needs while achieving reduced pitch.
Solution Approach 2:
The patent applies different hard mask layers (first hard mask layer and second hard mask layer) to different regions or feature types, allowing each region to have optimized properties for its specific requirements. This local quality approach enhances process flexibility while maintaining small feature sizes.
3Manufacturing precision
If multiple lithography processes are used to form complex patterns, then design freedom and uniformity improve, but device complexity increases
Solution Approach 1:
The patent merges multiple lithography processes into a unified pattern formation workflow, where the first and second lithography processes work together to create the final pattern. This merging approach maintains uniformity through coordinated process steps while managing overall device complexity through integrated process flow.
Solution Approach 2:
The patent creates a multi-functional patterning system where the combined lithography processes can form various pattern types (trench lines, trimmed trench lines, and other features) using a unified approach. This universality maintains uniformity across different feature types while providing a consistent process framework that manages complexity.
Data Source
AI summary
The present disclosure provides a method for forming patterns in a semiconductor device. In accordance with some embodiments, the method includes providing a substrate and a patterning-target layer formed over the substrate; forming a first cut pattern in a first hard mask layer formed over the patterning-target layer; forming a second cut pattern in a second hard mask layer formed over the patterning layer, the first hard mask layer having a different etching selectivity from the second hard mask layer; selectively removing a portion of the second cut pattern in the second hard mask layer and a portion of the patterning-target layer within a first trench; and selectively removing a portion of the first cut pattern in the first hard mask layer and a portion of the patterning-target layer within a second trench.