Lithography Hot Spot Detection via OPC Segmentation
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Solution Overview
Problem
As semiconductor integrated circuits scale down to smaller technology nodes, hot spots such as pinching, necking, bridging, and metal line thickness variations become more prevalent, causing device performance issues, and existing detection and correction methods are not entirely satisfactory.
Innovation Solution
The method involves receiving an integrated circuit design layout, performing optical proximity correction (OPC), identifying critical areas, simulating the pattern for hot spots, and modifying the design layout if hot spots are detected, with the option to apply a lithography process check (LPC) to ensure compliance with hot spot rules, ultimately fabricating a mask based on the modified layout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If optical proximity correction (OPC) is performed on IC design layout, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The IC design layout is divided into multiple critical areas that are identified and analyzed separately. The system segments the layout into regions requiring different levels of inspection and correction, allowing OPC to be applied selectively to critical regions rather than uniformly across the entire design, thus improving precision where needed while managing overall complexity.
Solution Approach 2:
The system performs preliminary identification of critical areas and potential hot spots before final mask fabrication. By detecting and correcting issues in the simulated IC patterns at the design stage, the system prevents manufacturing defects before they occur, improving manufacturing precision while avoiding the need for complex post-manufacturing corrections.
2Reliability
If comprehensive hot spot detection is performed on entire IC layout, then reliability is improved, but loss of time increases
Solution Approach 1:
Instead of analyzing the entire IC layout uniformly, the system segments the design into critical areas that are more susceptible to hot spots. By focusing computational resources on these identified critical regions rather than the complete layout, the system maintains high reliability through thorough inspection of problem-prone areas while significantly reducing the overall analysis time.
Solution Approach 2:
The system applies different levels of detection and analysis quality to different regions of the IC layout. Critical areas receive intensive hot spot detection and OPC modifications, while non-critical areas undergo lighter inspection. This localized approach ensures high reliability for critical functions while minimizing the total time required for comprehensive analysis.
Data Source
AI summary
The present disclosure provides for many different embodiments. A mask fabrication method and system is provided. The method and system identify critical areas of an integrated circuit (IC) design layout that has undergone optical proximity correction. The critical areas are areas of the OPCed IC design layout that are at risk for hot spots. A lithography process check is then performed on the critical areas of the OPCed IC design layout.