Lithography Overlay Compensation Using Substrate Mapping
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing overlay errors during lithography patterning, which becomes more complex as IC geometry sizes decrease and functional density increases, requiring advanced methods to maintain manufacturing efficiency and accuracy.
Innovation Solution
A method for integrated circuit fabrication that involves coating a resist layer on a substrate, collecting overlay data, determining overlay compensation using an alignment model, and adjusting the lithography system to reduce overlay errors, thereby enhancing overlay quality and maintaining throughput.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If advanced lithography technologies are used to achieve smaller geometry sizes and higher functional density, then manufacturing efficiency and production capacity are improved, but overlay errors become more challenging to reduce and manufacturing precision deteriorates
Solution Approach 1:
The system performs preliminary overlay error measurement and compensation calculations before the actual lithography exposure. By measuring overlay errors on the substrate and calculating compensation values in advance, the system prepares correction parameters that are then applied during subsequent lithography steps, preventing overlay errors from affecting final pattern alignment
Solution Approach 2:
The system implements a feedback loop where overlay errors are measured on the substrate, compensation values are calculated based on these measurements, and the compensation parameters are fed back to adjust the lithography system. This closed-loop control continuously improves overlay quality by using actual measurement data to refine subsequent patterning operations
2Manufacturing precision
If overlay measurement and compensation processes are implemented to improve overlay quality, then manufacturing precision is improved, but process complexity and measurement time increase
Solution Approach 1:
The system uses the lithography system's own imaging capabilities to perform overlay measurements on the substrate rather than requiring separate external measurement equipment. The lithography system images alignment marks and measures overlay errors directly, allowing the system to self-diagnose and self-correct overlay issues without adding external measurement devices
Solution Approach 2:
The lithography system performs multiple functions: it patterns the substrate, measures overlay errors on the substrate, calculates compensation values, and applies compensation corrections. By integrating measurement and correction capabilities into the existing lithography system, the patent avoids adding separate measurement and compensation equipment, thereby reducing overall process complexity
3Manufacturing precision
If full mapping of overlay data is collected to improve compensation accuracy, then overlay quality is improved, but throughput of the lithography system decreases
Solution Approach 1:
The system performs full mapping of overlay data at selective stages or for selective substrates rather than continuously for every substrate. By applying full mapping only when needed (such as for initial characterization or when overlay issues are detected), the system achieves high compensation accuracy for critical cases while maintaining normal throughput for routine production
Solution Approach 2:
The system performs comprehensive overlay data collection and compensation model development in advance before high-volume production. By establishing accurate compensation models through full mapping during initial setup or calibration phases, the system creates reusable compensation parameters that can be applied rapidly during subsequent production without requiring repeated full mapping measurements
Data Source
AI summary
The present disclosure provides a method. The method includes forming a resist layer on a patterned substrate; collecting first overlay data from the patterned substrate; determining an overlay compensation based on mapping of second overlay data from an integrated circuit (IC) pattern to the first overlay data from the patterned substrate; performing a compensation process to a lithography system according to the overlay compensation; and thereafter performing a lithography exposing process to the resist layer by the lithography system, thereby imaging the IC pattern to the resist layer.