Lithography Overlay Correction via Feed-Forward and Feedback Metrology
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Solution Overview
Problem
Current lithography process control methods measure critical dimensions and overlay after the process, leading to time-consuming rework processes and reduced die yield due to process-induced errors in alignment marks, which are sensitive to asymmetry and induce systematic errors in wafer alignment.
Innovation Solution
A method and system that measure metrology parameters of alignment marks and layers before the lithography process to derive correction factors via a feed-forward process, and additional measurements after the process to provide adjustments via a feedback loop, improving overlay accuracy and reducing rework.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If overlay measurement is performed after the lithography process using stand-alone tools, then measurement can be carried out, but the process is time-consuming and requires rework that reduces productivity
Solution Approach 1:
The patent implements preliminary overlay measurements using the lithography tool itself before the full lithography process completes. Alignment marks are measured and correction terms are calculated in advance, allowing proactive adjustment of scanner parameters before wafers proceed through the complete lithography cycle, thereby eliminating time-consuming post-process rework
Solution Approach 2:
The system establishes a feedback loop where overlay measurements are continuously taken during the lithography process, correction terms are calculated based on measured deviations, and scanner parameters are adjusted in real-time. This closed-loop control enables dynamic optimization of overlay accuracy while maintaining high productivity by preventing defective wafers from completing the entire process
2Manufacturing precision
If process control is performed after lithography completion, then critical dimensions and overlay can be evaluated, but rework is required which reduces die yield
Solution Approach 1:
The patent performs preliminary measurements of alignment marks and critical dimensions during the lithography process itself, before the wafer completes processing. Correction terms are calculated and applied proactively, allowing defective wafers to be identified and corrected early in the process flow, preventing propagation of errors that would reduce die yield
Solution Approach 2:
A feedback mechanism continuously monitors critical dimensions and overlay during lithography, comparing measurements against specification limits. When deviations are detected, the system automatically adjusts scanner parameters and notifies operators, enabling real-time correction before wafers complete processing and before rework becomes necessary
3Ease of operation
If alignment marks are used for wafer alignment, then the scanner can align previous and new layer patterns, but process-induced asymmetry creates systematic errors in alignment
Solution Approach 1:
The system implements feedback by measuring alignment marks during the lithography process and calculating correction terms based on measured deviations from expected positions. These correction terms are applied to compensate for process-induced asymmetry and systematic errors, maintaining alignment accuracy despite variations in alignment mark geometry
Solution Approach 2:
The patent dynamically adjusts scanner alignment parameters based on real-time measurements of alignment marks. Correction terms modify the scanner's stage positioning and optical alignment parameters to compensate for asymmetry in alignment marks caused by process variations, thereby maintaining precise alignment between layers
Data Source
AI summary
A method may include, but is not limited to, receiving a measurement including a metrology parameter for a layer of a metrology target and an alignment mark from an overlay metrology tool prior to a lithography process; deriving a merit figure from the metrology parameter and the alignment mark; deriving a correction factor from the merit figure; providing the correction factor to the lithography process via a feed forward process; receiving an additional measurement including an additional metrology parameter for the layer and an additional layer from an additional overlay metrology tool after the lithography process; deriving an adjustment from the additional metrology parameter; and providing the adjustment to the lithography process via a feedback process.