Semiconductor Lithography Overlay Correction via Deformation Measurement

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Solution Overview

Problem

Conventional overlay metrology in semiconductor manufacturing is inadequate in ensuring precise alignment between layers, leading to reduced device performance or failure due to misalignments, as the complexity of devices increases with smaller critical dimensions.

Innovation Solution

A lithography system that includes an exposure module, an overlay module, and a control module to perform deformation and overlay measurements, generating corrections for deformation-induced and unit-induced overlay errors, which are then used to adjust exposure process parameters in real-time, ensuring precise alignment and reducing overlay errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional overlay metrology is used to check alignment, then the manufacturing process is simple, but the alignment precision between layers is insufficient

Engineering Contradiction:
Improvealignment precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The system performs deformation measurements and generates correction values before the exposure process. The overlay control module uses these pre-calculated corrections to adjust exposure parameters, ensuring high alignment precision without adding complex real-time measurement systems during exposure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an overlay control module as an intermediary between the deformation measurement and exposure process. This module processes deformation measurements, generates correction values, and adjusts exposure parameters, thereby achieving high alignment precision without directly complicating the exposure system itself.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If real-time overlay control is implemented, then alignment precision improves, but the device complexity increases

Engineering Contradiction:
Improveoverlay error controlVSAvoidsystem complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines deformation measurement, overlay measurement, correction value generation, and exposure parameter adjustment into a single integrated overlay control module. This merging approach achieves real-time overlay control while avoiding the complexity of multiple separate systems working in coordination.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system implements feedback by using overlay measurements to generate correction values that are applied to subsequent exposure processes. This closed-loop feedback mechanism continuously improves alignment precision without requiring complex manual intervention or multiple iterative measurement cycles.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If deformation measurements are performed to generate corrections, then overlay error reduces, but the measurement time increases

Engineering Contradiction:
Improveoverlay errorVSAvoidmeasurement time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Deformation measurements are performed and correction values are generated before the exposure process begins. This preliminary action allows the system to prepare correction data in advance, reducing the need for time-consuming measurements during production and minimizing overall measurement time while maintaining high precision.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8703368B2Lithography process
Publication Date: 2014.04.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8703368B2 patent drawing
  • US8703368B2 patent drawing
  • US8703368B2 patent drawing

AI summary

A process for use in lithography, such as photolithography for patterning a semiconductor wafer, is disclosed. The process includes receiving an incoming semiconductor wafer having various features and layers formed thereon. A unit-induced overlay (uniiOVL) correction is received and a deformation measurement is performed on the incoming semiconductor wafer in an overlay module. A deformation-induced overlay (defiOVL) correction is generated from the deformation measurement results by employing a predetermined algorithm on the deformation measurement results. The defiOVL and uniiOVL corrections are fed-forward to an exposure module and an exposure process is performed on the incoming semiconductor wafer.