Lithography Overlay Error Reduction via Real-Time Signal Extraction
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Solution Overview
Problem
Current lithography processes are inefficient in monitoring and correcting overlay errors in real-time during the exposure process, leading to potential defects and circuit failures due to misalignment of patterns on semiconductor wafers, and require additional wafer areas and metrology systems for overlay checks.
Innovation Solution
A lithography system equipped with an electron beam source, sensors, and a pattern extraction module that collects and analyzes radiation signals to determine overlay errors between patterned layers and resist layers during the exposure process, allowing for real-time correction of overlay shifts using feedback mechanisms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If overlay check is performed using existing technologies, then overlay errors can be monitored, but the process is time consuming and not efficient
Solution Approach 1:
The patent combines the overlay monitoring function with the lithography exposure tool itself, merging two previously separate functions (exposure and overlay measurement) into a single integrated system. This eliminates the need for separate overlay measurement steps and tools, enabling real-time overlay error detection during the exposure process without reducing manufacturing throughput.
2Measurement precision
If overlay check is performed using existing technologies, then overlay errors can be detected, but additional wafer areas are consumed by overlay marks
Solution Approach 1:
The patent extracts the overlay measurement function from traditional overlay marks and integrates it into the lithography exposure tool. Instead of using dedicated overlay marks on the wafer, the system utilizes the lithography tool's own imaging system to perform overlay measurement during exposure, thereby eliminating the need for additional wafer area consumption for overlay marks.
3Measurement precision
If overlay check is performed using existing technologies, then overlay shifts on overlay marks can be evaluated, but overlay shifts on real circuit cannot be accurately assessed
Solution Approach 1:
The patent enables the lithography exposure tool to perform overlay measurement on the actual circuit patterns being exposed, rather than on separate overlay marks. The system uses the tool's own imaging system to measure overlay shifts on the real circuit features, providing accurate assessment of circuit alignment that directly reflects the exposure process performance.
4Measurement precision
If overlay errors are monitored after lithography process, then errors can be checked against criteria, but real-time feedback to lithography tool during exposure process is not available
Solution Approach 1:
The patent performs overlay measurement during the lithography exposure process itself, rather than after completion. By conducting the measurement in advance and in real-time during exposure, the system provides immediate feedback that can be used to adjust subsequent exposure parameters, preventing the accumulation of overlay errors across multiple layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables real-time monitoring and correction of overlay errors, reducing defects, conserving wafer space, and enhancing manufacturing throughput by integrating overlay monitoring directly into the lithography exposure process without the need for additional metrology tools, thus improving the accuracy and efficiency of semiconductor wafer patterning.
Implementation Method 1
a lithography system equipped with an electron beam source
Implementation Method 2
sensors, and a pattern extraction module that collects and analyzes radiation signals
Data Source
AI summary
Disclosed is a lithography system. The lithography system includes a radiation source to provide radiation energy for lithography exposure; a substrate stage configured to secure a substrate; an imaging lens module configured to direct the radiation energy onto the substrate; at least one sensor configured to detect a radiation signal directed from the substrate; and a pattern extraction module coupled with the at least one sensor and designed to extract a pattern of the substrate based on the radiation signal.


