Lithography Scanner Scan Speed Control for Higher Throughput

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Solution Overview

Problem

Conventional methods for improving lithography scanner throughput through hardware upgrades or continuous process improvements are costly and risky, leading to minimal gains while increasing overlay and focus range issues.

Innovation Solution

Optimizing scan speed of the lithography scanner based on the scan length of the wafer layout by varying the velocity of the reticle and wafer stage assemblies, using a controller to determine optimal scan speeds for different field types on the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scan speed is increased to improve throughput, then productivity increases, but overlay and focus quality deteriorates

Engineering Contradiction:
ImprovethroughputVSAvoidoverlay and focus quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies dynamics by making the scan speed adjustable rather than fixed. The system dynamically adapts the scan speed based on the specific wafer layout characteristics, field positions, and scan lengths. This allows the scanner to optimize speed for each individual field, achieving higher throughput while maintaining quality through context-aware speed modulation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of scan speed based on multiple factors including field position (center vs. edge), scan length, and wafer layout type. By varying the scan speed parameter according to these conditions, the system achieves optimal throughput for each specific exposure scenario while maintaining manufacturing precision requirements.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If scan speed is optimized for maximum throughput, then productivity increases, but acceleration time loss increases

Engineering Contradiction:
ImprovethroughputVSAvoidacceleration time loss
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system changes the scan speed parameter based on the specific field characteristics and scan length. For shorter scan lengths, the system uses lower speeds to minimize acceleration time loss, while for longer scan lengths it employs higher speeds to maximize throughput. This adaptive parameter adjustment optimizes the trade-off between speed and acceleration time.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The scan speed is dynamically adjusted based on real-time analysis of the wafer layout and field positions. The system calculates optimal speeds for each field considering the scan length and position, creating a dynamic speed profile that minimizes overall processing time while maintaining throughput efficiency.

Inventive Principle:
Principle #15Dynamics

3Productivity

If conventional fixed scan speed is used, then device complexity is low, but throughput is suboptimal

Engineering Contradiction:
ImprovethroughputVSAvoidscan speed control complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system transitions from a fixed scan speed approach to a dynamic, adaptive speed control system. The controller analyzes wafer layout characteristics, field positions, and scan lengths to automatically determine optimal scan speeds. This dynamic approach increases throughput by optimizing speed for each field while the automation reduces operational complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The scan speed control system is self-adjusting, automatically determining optimal speeds based on the wafer layout and field characteristics without requiring manual intervention. The controller autonomously analyzes the exposure recipe and layout data to calculate and apply appropriate scan speeds, reducing the need for complex manual configuration while maximizing throughput.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12625434B2Lithography scanner throughput
Publication Date: 2026.05.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12625434B2 patent drawing
  • US12625434B2 patent drawing
  • US12625434B2 patent drawing

AI summary

A method and system for optimizing scan speed of a lithography scanner. A process design layout corresponding to a plurality of rows of fields to be formed on an associated wafer is received and a default machine constant of the lithography scanner is determined. Each of the plurality of rows is then identified corresponding to the received process design layout. A scan speed for each determined type of row and the determined default machine constant is then determined. The associated wafer is then processed utilizing the determined scan speed for each of the plurality of rows in accordance with the process design layout.