Lithography Stress and Overlay Control via Metrology
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Solution Overview
Problem
Current lithographic processes struggle to accurately control non-uniform stress and resulting distortions in semiconductor wafers, leading to yield issues due to inadequate measurement and adjustment capabilities, especially during rapid thermal annealing and patterning steps.
Innovation Solution
Implementing a system that uses high-order wafer and field-level stress and topography metrology data in feed-forward and feedback control loops to adjust patterning, deposition, and thermal processing tools, enabling real-time corrections and improving die yield by measuring stress and shape variations across the wafer with high spatial density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high spatial density metrology measurements are implemented across the wafer, then stress and topography measurement precision is improved, but measurement time and system complexity increase
Solution Approach 1:
The wafer surface is divided into multiple discrete measurement locations where stress and topography are measured at specific points rather than continuously across the entire surface. This segmentation allows comprehensive coverage while reducing total measurement time compared to continuous scanning methods.
Solution Approach 2:
The metrology system is designed to perform multiple measurement functions simultaneously or in rapid sequence at each measurement location, including stress measurement, topography measurement, and overlay registration, thereby reducing the number of separate measurement passes required.
2Measurement precision
If high spatial density metrology measurements are implemented across the wafer, then stress and topography measurement precision is improved, but device complexity increases
Solution Approach 1:
The measurement system is divided into modular components that can be independently configured and calibrated. Each measurement location uses standardized measurement probes and algorithms, simplifying the overall system architecture despite the high number of measurement points.
Solution Approach 2:
The same measurement probe and algorithm suite is replicated and applied at each measurement location across the wafer surface. This standardization reduces the complexity of managing diverse measurement techniques while achieving high spatial density coverage.
3Manufacturing precision
If real-time stress compensation adjustments are made during lithographic patterning, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
Stress measurements taken before lithographic patterning are fed back to the lithography tool to dynamically adjust focus and overlay parameters. This closed-loop feedback enables real-time compensation for stress-induced distortions without requiring complex manual intervention.
Solution Approach 2:
Stress measurements and compensations are performed before the lithographic patterning step, allowing the system to pre-correct for anticipated stress effects. This preliminary action simplifies the actual patterning process by eliminating the need for complex real-time adjustments during exposure.
4Manufacturing precision
If feedforward control using metrology data is applied to lithographic patterning, then manufacturing precision is improved, but measurement precision requirements increase
Solution Approach 1:
The feedforward control system applies locally-specific compensation parameters to different regions of the wafer based on local stress measurements. Rather than requiring uniformly high precision across all measurements, the system focuses measurement and correction resources on critical areas where stress effects most impact manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise compensation of stress-induced distortions, enhancing die yield and overlay registration, even with non-uniform stress changes, by using detailed metrology data to adjust processing tools in real-time, thereby improving manufacturing efficiency and reducing the need for multiple tools.
Implementation Method 1
U.S. Pat. Nos. 5,134,303 and 5,248,889 (Blech et al) disclose a technique for scanning laser beams along a diameter of a wafer in order to measure the slope, and hence, curvature of the wafer.
Implementation Method 2
U.S. Pat. No. 6,100,977 to Muller and U.S. Pat. No. 6,847,458 to Freischlad et al. disclose techniques that are capable of essentially simultaneously measuring the displacement of both sides of the of wafer using optical interferometers.
Data Source
AI summary
A method and apparatus for process control in a lithographic process are described. Metrology may be performed on a substrate either before or after performing a patterning process on the substrate. One or more correctables to the lithographic patterning process may be generated based on the metrology. The patterning process performed on the substrate (or a subsequent substrate) may be adjusted with the correctables.


