Live Kernel Updates Under Memory Constraints Via External Memory

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Solution Overview

Problem

Conventional systems fail to perform live kernel updates with zero downtime when memory constraints are present, requiring additional overhead and operations for memory management.

Innovation Solution

The system acquires memory from an external entity through a high-speed interconnect interface, such as OpenCAPI or CXL, to perform live kernel updates on a new virtual machine, ensuring cache coherency and releasing the memory back to the external entity upon completion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory is acquired from an external entity through a high-speed interconnect interface to perform live kernel updates, then memory resources are dynamically increased enabling zero-downtime updates, but system complexity increases due to external memory management overhead

Engineering Contradiction:
Improvezero-downtime update capabilityVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses a cache coherent interconnect interface as an intermediary between the local system memory and external entity memory. This intermediary maintains cache coherency protocols that automatically manage data consistency between local and external memory, reducing the complexity of manual memory management while enabling dynamic memory expansion for zero-downtime kernel updates

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extends the memory address space by incorporating external entity memory through a cache coherent interconnect interface. This adds another dimension to the memory architecture, allowing the system to access memory beyond local constraints while maintaining unified memory management, thereby enabling zero-downtime kernel updates without proportionally increasing management complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If memory is acquired from an external entity through a cache coherent interconnect interface, then data integrity is maintained through cache coherency, but communication overhead increases

Engineering Contradiction:
Improvedata integrityVSAvoidcommunication overhead
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent establishes cache coherency protocols in advance through the cache coherent interconnect interface before memory access operations begin. By pre-configuring the cache coherence mechanisms and memory mapping, the system maintains data integrity without incurring overhead during actual kernel update operations, as the coherence management is already in place and automated

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If a new virtual machine is spun off to perform live kernel updates under memory constraints, then update capability is maintained, but resource overhead increases

Engineering Contradiction:
Improveupdate capabilityVSAvoidresource overhead
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent merges the kernel update operation with the virtual machine infrastructure by spinning off a new virtual machine to perform the live kernel update. This merging allows the update process to share underlying hardware resources and leverage existing virtualization management mechanisms, reducing overall resource overhead while maintaining full update capability even under memory constraints

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250298607A1Live kernel updates under memory constraints
Publication Date: 2025.09.25 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250298607A1 patent drawing
  • US20250298607A1 patent drawing
  • US20250298607A1 patent drawing

AI summary

Embodiments detect a memory constraint in response to a live kernel update (LKU) operation being planned; acquire memory from an external entity through a hardware connection in response to detecting the memory constraint; perform the LKU operation using the acquired memory from the external entity; release the acquired memory; and output a success message which indicates that the LKU operation has been successfully completed in response to the acquired memory being released.