LL-IFMM Parasitic Extraction Solver for Ill-Conditioned Circuits
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Solution Overview
Problem
Current methods for parasitic extraction in modern integrated circuits, such as the Method of Moments (MoM), face challenges with ill-conditioned problems and large numbers of right-hand sides, leading to inaccurate results and long simulation times, especially in complex geometries like thin conductors and multiscale meshes.
Innovation Solution
The implementation of a left-looking incomplete inverse fast multipole method (LL-IFMM) for matrix operations, combined with forward and backward substitution, and parallelization using the elimination tree method, enhances the accuracy and speed of parasitic extraction by reducing processing speed and resource requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If iterative methods are used for solving MoM integral equations, then the solver can handle large geometries, but the solution time becomes very long and accuracy deteriorates for ill-conditioned problems
Solution Approach 1:
The patent segments the MoM matrix into block-diagonal and off-diagonal components, applying different solution strategies to each part. The block-diagonal parts are solved using direct solvers for accuracy, while off-diagonal parts use iterative methods for efficiency, resolving the contradiction between handling large geometries and reducing solution time.
Solution Approach 2:
The patent changes the solving approach based on problem conditioning parameters. For well-conditioned problems, iterative methods are used; for ill-conditioned problems, direct solvers are activated. This dynamic parameter change allows the solver to maintain both speed and accuracy across different geometry types.
2Loss of time
If direct solvers are used for MoM integral equations, then solution time for many right-hand sides is reduced, but setup time increases and memory requirements grow
Solution Approach 1:
The patent applies direct solvers only to the essential block-diagonal parts of the matrix rather than the entire matrix. This partial application of direct solving provides sufficient accuracy for critical components while avoiding the excessive setup time and memory consumption that would result from fully direct solving the entire system.
Solution Approach 2:
The patent introduces an iterative solver as an intermediary for handling the off-diagonal parts of the matrix. This intermediary approach allows the system to leverage the speed of direct solvers for critical components while using the efficiency of iterative methods for less critical components, balancing setup time and solution time.
3Reliability
If block-diagonal or loop-tree preconditioning methods are used, then convergence is improved for many cases, but effectiveness deteriorates for extreme geometries like thin conductors and resonating structures
Solution Approach 1:
The patent dynamically changes the solving strategy based on problem conditioning parameters. When ill-conditioning is detected in extreme geometries, the system switches from iterative methods to direct solvers for the affected blocks, ensuring reliability across all geometry types rather than relying on a single preconditioning approach.
Solution Approach 2:
The patent implements a dynamic solver selection mechanism that adapts to the specific characteristics of each geometry. The system monitors convergence behavior and automatically adjusts between iterative and direct solving strategies during execution, making the solver versatile across different geometry classes including extreme cases.
Data Source
AI summary
Machine assisted systems and methods for use in a solver are described. These systems and methods can use the solver to perform a setup phase, based on left-looking incomplete inverse fast multipole (LL-IFMM) operation on matrix A, and perform a solve phase for calculating a matrix-vector product for the matrix A based on a forward and backward substitution (FBS) method. The parallelization of the setup phase and the solve phase based on an elimination tree method. The parallelization of the setup phase and the solve phase being implemented using hybrid scheduling. The solver, once implemented, can provide timely solutions for ill-conditioned problems, such as circuits with thin conductors. The solver can also enhance a parasitic extractor accuracy when solving problems with a very large number of right-hand sides (RHS).