LLVM-Based System C Compiler for Hardware Synthesis

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Solution Overview

Problem

Current CAD systems for integrated circuit design lack the ability to specifically define hardware components like I/O ports, finite state machines, and storage elements, limiting their effectiveness in modeling and synthesizing complex circuits such as microprocessors.

Innovation Solution

A low-level virtual machine (LLVM)-based system C compiler is developed to translate system C models into hardware description language (HDL), generating a hardware connection model, parsing the system C model into LLVM intermediate representation, and converting it to system LLVM IR to create a direct mapping for HDL generation, including the creation of finite-state machines and optimization of functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional CAD systems are used for integrated circuit design, then the design process can proceed through high-level programming language to hardware implementation, but the systems cannot specifically define hardware components like I/O ports, finite state machines, and storage elements

Engineering Contradiction:

Improveability to define hardware componentsVSAvoidsystem complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces LLVM as an intermediary layer between the C programming language and hardware description languages. This intermediary enables the system to translate high-level C code into hardware-specific representations while maintaining the ability to define hardware components like I/O ports, finite state machines, and storage elements, thus resolving the contradiction between adaptability and complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The translation process is segmented into distinct phases: parsing C code into LLVM intermediate representation, generating hardware connection models, and finally producing hardware description language code. This segmentation allows each phase to handle specific aspects of hardware component definition independently, improving adaptability without proportionally increasing overall system complexity

Inventive Principle:

Principle #1Segmentation

2Adaptability or versatility

If unrestricted FSM, I/O ports and storage elements are created in traditional systems, then Boolean logic can be processed, but specific definitions of hardware components cannot be accommodated

Engineering Contradiction:

Improvehardware component definition capabilityVSAvoidhardware component specification accuracy

Core Design Contradiction:

Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent changes the parameters of hardware component representation by introducing type systems and annotations in the LLVM intermediate representation. This allows specific definitions of hardware components with precise parameters (such as data width, timing characteristics, and interface protocols) to be maintained throughout the translation process, thereby improving both adaptability and manufacturing precision simultaneously

Inventive Principle:

Principle #35Parameter changes

3Ease of operation

If high-level programming language is used without hardware concepts, then algorithmic design is simplified, but hardware requirements like I/O ports, FSM, and storage elements cannot be properly modeled

Engineering Contradiction:

Improvealgorithmic design simplicityVSAvoidhardware model accuracy

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent performs preliminary actions by inserting hardware-specific annotations and type information into the LLVM intermediate representation during the translation phase, before final hardware code generation. This preliminary action ensures that hardware requirements are properly modeled early in the process while keeping the original high-level algorithmic design simple and maintainable

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The LLVM intermediate representation serves as a mediator that preserves the simplicity of high-level algorithmic design while enabling proper hardware modeling. It bridges the gap between software-oriented C programming and hardware-specific requirements by maintaining both the algorithmic structure and the necessary hardware component specifications throughout the translation process

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS10545739B2LLVM-based system C compiler for architecture synthesis

Publication Date: 2020.01.28 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A low level virtual machine (LLVM)-based system C compiler for architecture synthesis is provided. In one aspect, a method for translating a system C model to hardware description language (HDL) is provided. The method includes the steps of: generating a hardware connection model (HCM) from the system C model, wherein the HCM defines modules and interconnects in a hardware system; parsing the system C model into a LLVM intermediate representation (IR); converting the LLVM IR to a system LLVM IR which records correspondence information between the LLVM IR and the HCM; and generating the HDL based on direct mapping of processes from the system LLVM IR and the HCM.