LM-UART Flow Control Signaling via Timing Thresholds
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Solution Overview
Problem
Existing line-multiplexed universal asynchronous receiver/transmitter (LM-UART) devices face challenges in maintaining reliable flow-control signaling due to limited output impedance control, leading to noise susceptibility and errors in 2-wire interfaces, which are essential for reducing pin counts in mobile communication devices.
Innovation Solution
The implementation of improved digital signaling schemes and error correction techniques that allow LM-UARTs to operate with general-purpose drivers, enabling hardware flow control over 2-wires by asserting and de-asserting flow-control signals based on specific voltage levels and timing, while overriding flow-control conditions to ensure reliable data transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If LM-UART devices use general-purpose drivers with limited output impedance control to reduce pin count, then pin requirements are reduced, but noise susceptibility and signaling errors increase
Solution Approach 1:
The patent changes the timing parameters of signaling by asserting flow-control early during the stop condition period and using specific pulse width thresholds (comparing second period duration against minimum flow-control pulse duration) to distinguish valid flow-control signals from noise, thereby maintaining reliability with reduced pin count
Solution Approach 2:
The transmitting device asserts the flow-control signal during the stop condition period before actual data transmission resumes, allowing the receiving device to prepare and detect the signal in advance, which improves noise immunity by establishing a clear timing window for signal detection
2Quantity of substance
If flow-control signals are multiplexed over data wires to reduce pin count, then pin requirements are reduced, but difficulty in detecting and measuring flow-control signals increases
Solution Approach 1:
The patent uses periodic timing windows (stop condition periods) during which flow-control signals are asserted, creating regular detection opportunities that simplify the receiving device's ability to distinguish flow-control signals from data signals through timing-based identification
Solution Approach 2:
The patent replaces complex electrical signal differentiation with timing-based detection, substituting the need for complex signal analysis with simpler time-duration comparison (checking if the low voltage state exceeds the minimum flow-control pulse duration), thereby reducing detection complexity
3Reliability
If impedance-controlled line drivers and keeper circuits are used to maintain signaling reliability, then signaling reliability improves, but device complexity increases
Solution Approach 1:
The system uses the existing stop condition timing mechanism to inherently provide the flow-control signal assertion window, eliminating the need for separate keeper circuits or complex impedance-controlled drivers, as the timing structure itself serves the dual purpose of data framing and flow-control signaling
Solution Approach 2:
The stop condition period serves multiple functions: it marks the end of data transmission, provides a timing window for flow-control signal assertion, and establishes the detection window for the receiving device, thereby eliminating the need for dedicated flow-control circuitry
Data Source
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AI summary
Systems, methods, and apparatus for line multiplexed serial interfaces are disclosed. A method performed by a transmitting device includes asserting a stop condition on a wire of a serial data link by driving the wire to a first voltage level for a first period of time that is less than a duration of the stop condition, monitoring the wire after the first period of time, determining that flow-control has been asserted when the wire remains at a second voltage level for a second period of time that exceeds a minimum period of time defined for flow-control pulses and after the first period of time has elapsed, refraining from transmitting data on the wire while flow-control is asserted, and transmitting data on the wire when flow-control is de-asserted.