LNA Dynamic Mode Switching for SoC Spur Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Low Noise Amplifiers (LNAs) in System-on-a-Chip (SoC) designs face challenges in balancing low power consumption with noise suppression, as they are susceptible to noise from digital circuitry sharing the same substrate, leading to increased power consumption when using fully differential-ended circuits and higher noise susceptibility with single-ended designs.
Innovation Solution
A Low Noise Amplifier (LNA) with an input for receiving signals at a tuned frequency, featuring an output circuit configurable between single-ended and pseudo differential-ended modes, where it operates in pseudo differential-ended mode when the tuned frequency matches the clock frequency or its harmonics and switches to single-ended mode otherwise, using a microcontroller to activate additional circuitry only when spur noise is a concern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fully differential-ended circuit is used to suppress noise from digital circuitry, then receiver sensitivity is improved, but power consumption dramatically increases
Solution Approach 1:
The LNA output circuit dynamically switches between single-ended and pseudo differential-ended modes based on the received signal frequency. When the signal frequency matches or is close to digital circuitry clock frequencies (where spur noise occurs), the circuit transitions to pseudo differential-ended mode for enhanced noise suppression. Otherwise, it operates in single-ended mode for lower power consumption.
2Use of energy by moving object
If a single-ended LNA design is used, then power consumption is reduced, but susceptibility to noise from digital circuitry increases
Solution Approach 1:
The patent applies different operational characteristics to different frequency ranges. For frequency ranges where spur noise is problematic (matching digital clock frequencies), the output circuit uses pseudo differential-ended mode with enhanced noise rejection. For other frequency ranges, it uses single-ended mode for efficiency, thus applying local quality optimization based on frequency-specific noise conditions.
3Object-affected harmful factors
If pseudo differential-ended mode is continuously used, then spur noise suppression is improved, but power consumption increases
Solution Approach 1:
The LNA output circuit periodically evaluates the received signal frequency against stored clock frequency information from digital circuitry. Based on this periodic assessment, it transitions between single-ended and pseudo differential-ended modes, activating the higher-power pseudo differential mode only during periods when spur noise is likely (frequency match detected), thereby reducing overall power consumption while maintaining noise suppression when needed.
Data Source
AI summary
A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode.