RF Amplifier Feedback Network for Precise Multi-Gain LNA Modes
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Solution Overview
Problem
Current RF front-end low-noise amplifiers (LNAs) face challenges in achieving ultra-low noise figure with high gain performance across multiple frequency bands while supporting various gain modes and linearity requirements, leading to complex circuit designs and increased costs.
Innovation Solution
The implementation of a radio frequency amplifier circuit with a feedback circuit comprising a resistive feedback circuit and a shunt feedback circuit, arranged in a ladder structure with switches to adjust impedance and provide multiple gain modes, enabling accurate gain reduction with good linearity and low noise figure degradation across different frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple gain modes are implemented to support different applications and frequency bands, then the adaptability and versatility of the LNA are improved, but the device complexity and circuit design effort increase significantly
Solution Approach 1:
The patent implements dynamic gain control through a feedback circuit with switchable resistor configurations. The LNA transitions between different gain modes (21dB, 18dB, 15dB, 12dB, 9dB, 6dB, 3dB, 0dB) by dynamically reconfiguring the feedback network, allowing a single circuit to adapt to multiple applications and frequency bands without requiring separate dedicated circuits for each gain mode
Solution Approach 2:
The patent changes the feedback resistor values to adjust the gain mode of the LNA. By switching between different resistor configurations in the feedback circuit (Rf1, Rf2, Rf3, Rf4, Rf5, Rf6), the system achieves precise gain control across 8 different gain modes, enabling the same hardware to serve multiple purposes with varying performance requirements
2Reliability
If the gain is reduced by 3dB to improve linearity performance, then the IIP3 and OIP3 performance are improved, but the power gain decreases
Solution Approach 1:
The patent employs a feedback circuit that samples the output signal and feeds it back to the input through switchable resistor networks. This feedback mechanism allows precise control of the gain reduction while maintaining stable operation, enabling the system to achieve improved linearity (higher IIP3 and OIP3) at lower gain levels without sacrificing overall system performance
3Measurement precision
If a feedback circuit with multiple resistor sets and switches is implemented to provide variable gain modes, then the gain control precision and linearity are improved, but the device complexity and chip space increase
Solution Approach 1:
The feedback circuit is segmented into multiple discrete resistor sets (Rf1-Rf6) that can be independently switched. Each resistor corresponds to a specific gain mode, allowing precise gain control through selective switching. This segmentation enables accurate gain adjustment while making the complex circuit more manageable and potentially easier to fabricate with standard CMOS processes
Data Source
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AI summary
An RF amplifier circuit (200) comprises an amplifier (110) and a feedback circuit (220). The feedback circuit (220) comprises a resistive feedback circuit (230) which is coupled between an input of the amplifier and an output of the amplifier and a shunt feedback circuit (240) which is coupled between the output of the amplifier and a reference input. The resistive feedback circuit (230) comprises a first set of serially coupled resistors and a first set of switches, wherein the first set of resistors and the first set of switches are arranged in a ladder structure in which each switch of the first set of switches is configured to bypass one of the resistors of the first set of resistors in a closed state thereof Furthermore, the shunt feedback circuit (240) comprises a second set of serially coupled resistors and a second set of switches, wherein the second set of resistors and the second set of switches are arranged in a ladder structure in which each switch of the second set of switches is configured to bypass one of the resistors of the second set of resistors in a closed state thereof.