Load Current Compensating Output Buffer Feedback Circuit
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Solution Overview
Problem
Output buffers in low drop-out (LDO) voltage regulators face instability due to high frequency poles when load current varies significantly, leading to bandwidth limitations and settling issues.
Innovation Solution
A load current compensating output buffer circuit is introduced, featuring a feedback impedance with a variable resistance circuit and Miller capacitance, coupled with a pass transistor and sense circuit to adjust resistance based on sensed load current, stabilizing the output buffer across varying load conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the load current varies from no load to full load (0 mA to 300 mA), then the load current bandwidth increases approximately 300 times, but the output buffer becomes unstable due to high frequency poles
Solution Approach 1:
The patent implements a dynamic compensation mechanism where the compensation capacitor is selectively connected or disconnected based on load current conditions. During no-load or low-load conditions, the compensation capacitor remains connected to maintain stability. When load current exceeds a threshold, the compensation capacitor is disconnected to prevent instability caused by excessive bandwidth. This dynamic switching resolves the contradiction between adaptability and stability.
Solution Approach 2:
The patent changes the compensation parameter (capacitor connection state) based on operating conditions. By monitoring load current and adjusting the compensation network configuration, the system adapts its stability characteristics to match the current load level, thereby maintaining stability across the full range from no-load to full-load conditions despite the 300x bandwidth variation.
2Stability of the object's composition
If the output buffer is designed for stability at no load, then stability is maintained at no load, but bandwidth is limited when load current increases
Solution Approach 1:
The system dynamically adjusts its compensation network based on load conditions. At no-load conditions, the full compensation capacitor is connected to ensure stability. As load current increases and exceeds a predetermined threshold, the compensation capacitor is selectively disconnected, allowing the bandwidth to expand to meet the higher load requirements while maintaining stability through the dynamic reconfiguration of the compensation network.
3Adaptability or versatility
If the output buffer is designed for high bandwidth at full load, then bandwidth is sufficient at full load, but the output buffer becomes unstable at no load
Solution Approach 1:
The compensation parameter (capacitor connection state) is changed based on load current magnitude. At full-load conditions, the compensation capacitor is disconnected to maximize bandwidth. At no-load or low-load conditions, the compensation capacitor is connected to ensure stability. This parameter change strategy allows the system to optimize for bandwidth when needed and for stability when needed, resolving the contradiction between adaptability and stability.
Data Source
AI summary
A load current compensating output buffer circuit and method are disclosed. The circuit includes a buffer amplifier coupled to a supply voltage and the inverting input receives an input voltage and the non-inverting input couples to an output capacitive load. A feedback impedance with a variable resistance circuit and a Miller capacitance in series is coupled to an output of the buffer amplifier and the capacitive load. A pass transistor couples to the supply voltage and the output capacitive load, the pass transistor having a gate terminal coupled to the output of the output buffer amplifier and the feedback impedance, a load current passing through the pass transistor. A sense circuit is configured to sense the load current and apply a control voltage to the variable resistance circuit to vary the resistance of the variable resistance circuit based on the load current.


