Load-Capacitance Driver Circuit With Self-Controlled MOSFET Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing load capacity driving circuits for LCDs face challenges in achieving high driving capability while maintaining low costs, with previous techniques either having low efficacy in wide output voltage ranges or requiring complex control circuits for charging and discharging operations.
Innovation Solution
The proposed load capacity driving circuit incorporates operational amplifiers with NMOS and PMOS transistors, where the gate potential of the output stage is connected to the drain and source of specific transistors, allowing for efficient charging and discharging without the need for external control signals, thereby simplifying the circuit structure and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistors of the output stage are provided in parallel to improve current supplying capability, then the driving capability is improved, but the circuit structure becomes more complex and surface area increases
Solution Approach 1:
The patent combines the charging and discharging control functions into a single transistor (Q3) that operates based on the output voltage level. When the output voltage is high, the transistor conducts to charge the load capacity; when the output voltage is low, the transistor turns off to discharge the load capacity. This merging of functions improves current supplying capability without requiring separate control circuits for charging and discharging, thus avoiding increased circuit complexity.
2Productivity
If separate control paths are provided for charging and discharging operations, then the driving capability is improved, but the control circuit structure becomes complex and surface area increases
Solution Approach 1:
The transistor Q3 serves multiple functions: it acts as a switch for both charging and discharging operations, and its gate voltage is automatically controlled by the output voltage level itself. This universal transistor handles both charging (when output voltage is high) and discharging (when output voltage is low) without requiring separate control signals or circuits, thereby improving productivity while maintaining simple circuit structure.
Solution Approach 2:
The control system is self-regulating through automatic level control. The output voltage level directly controls the gate voltage of transistor Q3, which in turn controls the charging and discharging of the load capacity. When the output voltage drops, the gate voltage decreases, turning off the transistor to enable discharging. This self-service mechanism eliminates the need for external control circuits, improving productivity without increasing complexity.
3Device complexity
If conventional operational amplifier configuration is used, then the circuit is simple, but the driving capability for large load capacities is insufficient
Solution Approach 1:
The patent introduces dynamic control of the output stage transistor Q3 based on the output voltage level. The transistor's conduction state changes dynamically: it conducts when the output voltage is high to charge the load capacity, and turns off when the output voltage is low to discharge the load capacity. This dynamic operation enables the simple operational amplifier circuit to drive large load capacities effectively, improving driving capability without increasing circuit complexity.
Data Source
AI summary
The present invention provides a load capacity driving circuit that is inexpensive and has a high driving capability. When an input signal changes to low potential, gate voltage of an output stage of an amplifying circuit increases, an NMOS transistor MNO turns on, and an NMOS transistor MN8 increases potential of a node NGAT. Due thereto, an NMOS transistor MNO2 also turns on, and a load capacity is discharged via the NMOS transistor MNO and the NMOS transistor MNO2. Further, when the input signal changes to high potential, gate voltage of the output stage of the amplifying circuit decreases, a PMOS transistor MPO turns on, and a PMOS transistor MP8 decreases potential of a node PGAT. Due thereto, a PMOS transistor MPO2 also turns on, and the load capacity is charged from a constant voltage source via the PMOS transistor MPO and the PMOS transistor MPO2.