Load/Store Module Predicts Cache Coherency for Bus Transaction

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Solution Overview

Problem

In multi-processor systems, the uncertainty in servicing bus transactions makes it difficult to simulate bus behavior, and existing load/store modules lack predictability in selecting transactions based on cache coherency, leading to inefficiencies in data processing.

Innovation Solution

A data processing device with a load/store module that determines a predicted coherency state of a cache line to select bus transactions, allowing for more predictable communication and easier simulation of bus behavior by not requiring all pending transactions to be serviced.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the load/store module waits for all pending bus transactions to be serviced before selecting the next transaction, then bus transaction completion is ensured, but the time uncertainty increases and predictability decreases

Engineering Contradiction:
Improvebus transaction completionVSAvoidtime uncertainty
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The load/store module performs preliminary determination of the predicted coherency state before actually servicing the bus transaction. By predicting the coherency state in advance based on the instruction type and current cache state, the system can select the next transaction without waiting for all pending transactions to complete, thereby reducing time uncertainty while maintaining transaction completion reliability.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If the load/store module uses complex coherency tracking for all pending transactions, then coherency management accuracy is improved, but the device complexity increases

Engineering Contradiction:
Improvecoherency state accuracyVSAvoidcoherency tracking complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system applies different coherency tracking approaches based on the local characteristics of each transaction. Instead of uniformly tracking all pending transactions with full complexity, the load/store module determines coherency state predictions based on the specific instruction type (load/store) and the current coherency state of the cache line, simplifying the tracking mechanism while maintaining accurate coherency management.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If the load/store module selects bus transactions based on predicted coherency state, then transaction selectability is improved, but the difficulty of detecting and measuring actual coherency state increases

Engineering Contradiction:
Improvetransaction selection flexibilityVSAvoidcoherency state detection
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The load/store module uses feedback from the current coherency state and instruction type to determine the predicted coherency state, which then guides bus transaction selection. The system maintains a register storing the current coherency state and uses this feedback information to predict the outcome of potential transactions, enabling flexible transaction selection while keeping coherency state detection manageable through systematic state tracking.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8949545B2Memory interface device and methods thereof
Publication Date: 2015.02.03 NEX-X SILICON LLC
  • US8949545B2 patent drawing
  • US8949545B2 patent drawing
  • US8949545B2 patent drawing

AI summary

A data processing device includes a load/store module to provide an interface between a processor device and a bus. In response to receiving a load or store instruction from the processor device, the load/store module determines a predicted coherency state of a cache line associated with the load or store instruction. Based on the predicted coherency state, the load/store module selects a bus transaction and communicates it to the bus. By selecting the bus transaction based on the predicted cache state, the load/store module does not have to wait for all pending bus transactions to be serviced, providing for greater predictability as to when bus transactions will be communicated to the bus, and allowing the bus behavior to be more easily simulated.