Multi-Slice Processor Load/Store Slice Rejection Handling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing multi-slice processors waste cycles and resources when handling rejected instructions, as they require the instruction sequencing unit to maintain and reissue instructions, leading to inefficiencies in processing and potential delays.

Innovation Solution

The load/store slice in the multi-slice processor determines rejection conditions for instructions and maintains state information instead of notifying the instruction sequencing unit, allowing for immediate reissue when conditions are resolved, thus reducing resource usage and cycle loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the instruction sequencing unit maintains and reissues rejected instructions, then the instruction can be eventually executed, but processing cycles are wasted and resources are consumed

Engineering Contradiction:
Improveinstruction execution completionVSAvoidprocessing cycles
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the function of maintaining rejected instructions from the instruction sequencing unit and relocates it to the load/store slice. This allows the instruction sequencing unit to stop tracking rejected instructions, freeing up resources and processing cycles while ensuring instructions are still executed when conditions are met.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The load/store slice becomes self-sufficient by maintaining its own rejected instructions and autonomously reissuing them when rejection conditions are resolved, without requiring continuous intervention or tracking from the instruction sequencing unit.

Inventive Principle:
Principle #25Self-service

2Reliability

If the instruction sequencing unit tracks rejected instructions, then instructions can be reissued when conditions are resolved, but device complexity increases

Engineering Contradiction:
Improveinstruction reissue capabilityVSAvoidinstruction tracking mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The tracking function is extracted from the instruction sequencing unit and placed in the load/store slice, reducing the complexity of the instruction sequencing unit while preserving the reissue capability through the load/store slice's local tracking mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The instruction processing system is segmented into distinct responsibilities: the instruction sequencing unit handles instruction issuance, while the load/store slice handles rejection detection, state maintenance, and reissue decision-making, reducing overall system complexity through functional separation.

Inventive Principle:
Principle #1Segmentation

3Reliability

If the load/store slice notifies the instruction sequencing unit of rejections, then the instruction sequencing unit can manage reissues, but resource usage increases

Engineering Contradiction:
Improverejection handlingVSAvoidresource usage
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The load/store slice handles rejection management independently by maintaining state information locally and autonomously reissuing instructions when conditions are resolved, eliminating the need for continuous communication and resource consumption associated with notifying the instruction sequencing unit.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The rejection management functionality is extracted from the instruction sequencing unit and assigned to the load/store slice, reducing the resource burden on the instruction sequencing unit while ensuring reliable rejection handling at the appropriate location in the processing pipeline.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10268518B2Operation of a multi-slice processor implementing a load/store unit maintaining rejected instructions
Publication Date: 2019.04.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10268518B2 patent drawing
  • US10268518B2 patent drawing
  • US10268518B2 patent drawing

AI summary

Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of load/store slices, and one or more instruction sequencing units, where operation includes: receiving, at a load/store slice from an instruction sequencing unit, a instruction to be issued; determining, at the load/store slice, a rejection condition for the instruction; and responsive to determining the rejection condition for the instruction, maintaining state information for the instruction in the load/store slice instead of notifying the instruction sequencing unit of a rejection of the instruction.