Load Store Execution Unit Data Reuse Mechanism

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Solution Overview

Problem

Processing systems face high latency and power consumption due to repeated execution of load instructions, which incur additional cache access expenses and stall dependent instructions, highlighting the need to reduce these costs without compromising functional correctness.

Innovation Solution

A load store execution unit determines if a load instruction's data can be reused from a prior execution without accessing the data cache, checking for functional errors and ensuring no changes in the cache line, thereby reusing the data if no errors are found.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If load instructions are re-executed to ensure functional correctness, then reliability is improved, but latency and power consumption increase

Engineering Contradiction:
Improvefunctional correctnessVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary checks before re-executing load instructions to determine if re-execution is necessary. The load store execution unit checks whether the cache line has been modified since the previous execution, and only re-executes if modifications are detected, thereby avoiding unnecessary re-execution latency while maintaining functional correctness

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism where the load store execution unit monitors cache line modification status and uses this information to control subsequent load instruction executions. This feedback loop allows the system to dynamically adjust re-execution behavior based on actual cache state, reducing unnecessary latency

Inventive Principle:
Principle #23Feedback

2Reliability

If load instructions access the data cache for each execution, then data freshness is ensured, but power consumption increases

Engineering Contradiction:
Improvedata freshnessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs a preliminary check of the cache line modification status before accessing the data cache. The load store execution unit determines whether the cache line has been modified since the previous load execution, and only accesses the cache if modifications are detected, thereby saving power while ensuring data freshness when necessary

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses a copy of the modification status information (stored in the load store execution unit) to determine whether cache access is needed, rather than directly accessing the cache for every load instruction. This copying approach allows the system to avoid unnecessary cache accesses and reduce power consumption

Inventive Principle:
Principle #26Copying

3Reliability

If load instructions are stalled while waiting for cache access, then data accuracy is maintained, but productivity decreases

Engineering Contradiction:
Improvedata accuracyVSAvoidinstruction throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary determination of cache line modification status before stalling instructions. The load store execution unit checks whether the cache line has been modified, and only stalls dependent instructions if modifications are detected and cache access is required. This approach maintains data accuracy while minimizing stalls and improving overall instruction throughput

Inventive Principle:
Principle #10Preliminary action

4Reliability

If evaluation load instructions consume access ports during re-execution, then functional checks are completed, but other instructions are denied execution opportunities

Engineering Contradiction:
Improvefunctional correctnessVSAvoidinstruction throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary determination of whether re-execution is necessary before consuming access ports. The load store execution unit checks cache line modification status and only initiates re-execution (which would consume access ports) if modifications are detected. This reduces unnecessary port consumption and allows other instructions to execute, improving overall throughput while maintaining functional correctness

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11620133B2Reduction of data cache access in a processing system
Publication Date: 2023.04.04 QUALCOMM INC
  • US11620133B2 patent drawing
  • US11620133B2 patent drawing
  • US11620133B2 patent drawing

AI summary

Systems and methods for reusing load instructions by a processor without accessing a data cache include a load store execution unit (LSU) of the processor, the LSU being configured to determine if a prior execution of a first load instruction loaded data from a first cache line of the data cache and determine if a current execution of the second load instruction will load the data from the first cache line of the data cache. Further, the LSU also determines if a reuse of the data from the prior execution of the first load instruction for the current execution of the second load instruction will lead to functional errors. If there are no functional errors, the data from the prior execution of the first load instruction is reused for the current execution of the second load instruction, without accessing the data cache for the current execution of the second load instruction.