Load Switch Gate Drive for Short-Circuit Negative Voltage Control
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Solution Overview
Problem
During a short circuit event, load switch integrated circuits experience a negative voltage at their output terminal, which can lead to circuit malfunctions or failures due to excessive current flowing through ESD diodes, as the large current can exceed the diode's threshold voltage, causing damage.
Innovation Solution
A gate drive circuit is configured to gradually reduce the gate voltage of the transistor during a short circuit event, clamping it to a predetermined voltage level (approximately two times the diode's voltage drop) and then discharging it to zero using a current source, thereby minimizing the negative voltage at the output terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate voltage is quickly reduced to turn off the transistor during a short circuit event, then the response speed is improved, but the negative voltage at the output terminal increases causing circuit damage
Solution Approach 1:
The gate drive circuit dynamically adjusts the gate voltage reduction rate based on the short circuit detection signal. When a short circuit is detected, the circuit transitions from normal fast switching mode to a controlled voltage reduction mode, where the gate voltage is gradually reduced at a controlled rate to minimize negative voltage while still providing protection.
Solution Approach 2:
The invention changes the gate voltage parameter from a binary state (fully on/off) to a controlled continuous reduction process. By adjusting the gate voltage reduction rate and using clamping circuits to limit the minimum gate voltage, the system optimizes the trade-off between switching speed and negative voltage suppression, preventing ESD diode damage.
2Object-affected harmful factors
If the gate voltage is gradually reduced during a short circuit event, then the negative voltage is minimized, but the response time increases
Solution Approach 1:
The gate drive circuit prepares for short circuit events by having pre-configured voltage reduction pathways and clamping circuits ready. When a short circuit is detected, the gradual voltage reduction begins immediately without needing to reconfigure the circuit, thus minimizing the time penalty while still achieving negative voltage suppression.
Solution Approach 2:
The invention skips the intermediate stages of gradual voltage reduction by using a detection signal that triggers immediate action. The clamping circuit rapidly establishes the minimum gate voltage threshold, and the voltage reduction process is accelerated through optimized circuit paths, reducing the overall response time while maintaining negative voltage control.
Data Source
AI summary
An apparatus includes a transistor coupled to a load through an output terminal of a load switch IC, a gate drive circuit connected to a gate of the transistor, wherein the gate drive circuit is configured such that in a short circuit event, a voltage on the gate of the transistor is gradually reduced, and wherein as a result of reducing the voltage on the gate of the transistor gradually, a negative voltage occurring at the output terminal of the load switch IC is minimized.