High-Voltage Load Switch Isolation Ring for MOSFET Latch-Up Prevention

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Solution Overview

Problem

MOSFET devices in load switches are prone to latch-up due to parasitic transistors forming a thyristor, leading to excessive power dissipation and potential damage when one of the parasitic transistors is inadvertently turned on.

Innovation Solution

A load switch design incorporating a pair of back-to-back connected transistors with a floating isolation ring and Schottky diodes to prevent latch-up, using a first Schottky diode to interrupt positive feedback and a second Schottky diode to clamp voltage fluctuations, thereby preventing excessive current and heat generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If back-to-back connected transistors are used to achieve bidirectional current blocking, then the load switch can disconnect the load from the power supply in both directions, but parasitic transistors form a thyristor that can inadvertently turn on causing latch-up

Engineering Contradiction:
Improvebidirectional current blocking capabilityVSAvoidlatch-up susceptibility
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A floating isolation ring is introduced as an intermediary structure between the back-to-back connected transistors. This isolation ring acts as a mediator that disrupts the parasitic thyristor feedback path, preventing latch-up while maintaining the bidirectional current blocking capability of the load switch

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The load switch structure is segmented into distinct regions including the floating isolation ring that separates the parasitic NPN and PNP transistors. This segmentation breaks the continuous feedback path of the parasitic thyristor, eliminating latch-up conditions while preserving the functional integrity of the bidirectional switch

Inventive Principle:
Principle #1Segmentation

2Device complexity

If parasitic transistors are present in the load switch structure, then the device can be simplified, but excessive power dissipation occurs when latch-up happens

Engineering Contradiction:
Improveload switch structure simplicityVSAvoidpower dissipation during latch-up
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The parasitic transistors that would normally create harmful latch-up conditions are reconfigured through the floating isolation ring structure. The isolation ring converts the potentially harmful parasitic feedback path into a benign configuration where the parasitic transistors cannot sustain latch-up, effectively turning the harmful effect into a non-threatening presence

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The floating isolation ring provides beforehand protection by preemptively disrupting the parasitic thyristor feedback path before latch-up can occur. This preventive structure cushions against the potential energy dissipation damage by eliminating the latch-up condition in advance

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively prevents latch-up by bypassing current through the parasitic diodes, maintaining stable operation and protecting the circuit from damage even under extreme voltage conditions.

Implementation Method 1

a first Schottky diode connected between the substrate and the isolation ring

Methodology Applied
Scientific EffectSchottky diode effect: Diode

Implementation Method 2

an isolation ring formed over a substrate, the isolation ring being configured to be floating

Methodology Applied
Scientific EffectElectrical isolation: Physical Containment

Data Source

PatentUS20260020342A1Latch-up Free High Voltage Device
Publication Date: 2026.01.15 HALO MICROELECTRONICS INT
  • US20260020342A1 patent drawing
  • US20260020342A1 patent drawing
  • US20260020342A1 patent drawing

AI summary

An apparatus includes a first drain/source region and a second drain/source region surrounded by an isolation ring formed over a substrate, the isolation ring formed being configured to be floating, and a first diode connected between the substrate and the isolation ring, wherein the first diode is a Schottky diode.