Local Charge Balance Structure for Superjunction Semiconductor Devices
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Solution Overview
Problem
Previous superjunction semiconductor devices face challenges in achieving optimal energy capability under unclamped inductive switching (UIS) due to low snapback current, leading to electrical failures and inadequate performance in charge balance, while also struggling with the trade-off between breakdown voltage and on-state resistance.
Innovation Solution
A local charge balance (LCB) structure is introduced, featuring a thick, low-doped p-type region formed below an n-type linking region and above the n-type drift region, which enhances breakdown voltage and snapback current without increasing process complexity or costs, by using techniques like epitaxial growth or ion implantation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple heavily-doped diffused n-type and p-type regions are used to replace lightly doped n-type epitaxial region in superjunction devices, then on-state resistance is reduced, but breakdown voltage decreases
Solution Approach 1:
The patent applies local quality by creating alternating n-type and p-type columns with different doping concentrations and dimensions. The n-type columns have higher doping concentration to reduce on-state resistance, while the p-type columns have lower doping concentration to maintain breakdown voltage. This spatial variation in material properties allows simultaneous optimization of both parameters that are typically contradictory.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The LCB structure improves energy capability, reduces avalanche events, and maintains a balance between breakdown voltage and on-state resistance, effectively addressing the limitations of previous devices by elevating snapback current and enhancing ruggedness during UIS tests.
Implementation Method 1
the low-doped p-type region is configured to compensate charge in the n-type drift region
Implementation Method 2
by using techniques like epitaxial growth or ion implantation
Implementation Method 3
by using techniques like epitaxial growth or ion implantation
Data Source
AI summary
In one embodiment, a semiconductor device has a superjunction structure formed adjoining a low-doped n-type region. A low-doped p-type region is formed adjoining the superjunction structure above the low-doped n-type region and is configured to improve Eas characteristics. A body region is formed adjacent the low-doped p-type region and a control electrode structure is formed adjacent the body region for controlling a channel region within the body region.