Local Connectivity Tracing for Reverse Engineered Circuit Schematics
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Solution Overview
Problem
Current image analysis techniques for constructing 2D/3D models of integrated circuits (ICs) face challenges in aligning multiple images, especially when the minimum feature size decreases, leading to increased computational resources and complexity, and there is no known method capable of producing a combined 3D model with precision sufficient for automated signal tracing without first generating a global 2D/3D model.
Innovation Solution
The method involves tracing connectivity separately in each overlap area, using disjoint sets as a data structure to represent connected objects and aligning pairs of images locally, allowing for automated connectivity tracing without requiring a global 3D model, and implementing a bundle adjustment process to correct errors in overlap areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If global bundle adjustment is used to align multiple images, then alignment precision is improved, but computational complexity and resource requirements increase significantly
Solution Approach 1:
The patent divides the global image alignment problem into multiple local overlap region alignments. Instead of performing bundle adjustment on all images simultaneously, it processes each overlap region independently between adjacent images, then integrates results. This segmentation reduces the computational scope from global to local, significantly lowering resource requirements while maintaining alignment precision through iterative refinement.
2Manufacturing precision
If minimum feature size decreases to increase IC detail resolution, then manufacturing precision is improved, but computational resources and alignment difficulty increase
Solution Approach 1:
By segmenting the alignment task into local overlap regions, the patent reduces the complexity of detecting and measuring small features. Each local region contains fewer and larger apparent features compared to the global view, making detection easier even when actual minimum feature sizes are small. The local processing approach allows use of simplified detection algorithms that are less computationally intensive.
Solution Approach 2:
The patent transforms the 2D image alignment problem into a 3D connectivity tracing problem by incorporating layer information and vertical connections. This dimensional transformation allows the system to handle small features more effectively by viewing them in the context of multi-layer connectivity rather than attempting to detect and align every small feature in 2D space.
3Measurement precision
If a global 2D/3D model is generated before connectivity tracing, then tracing accuracy is improved, but processing time and computational load increase
Solution Approach 1:
The patent performs preliminary local alignments in each overlap region before conducting connectivity tracing. Instead of generating a complete global model first, it prepares only the necessary local alignment information in advance. This preliminary action provides sufficient accuracy for tracing while avoiding the time-consuming process of creating and processing a full global model.
Solution Approach 2:
The patent extracts and processes only the essential alignment information from overlap regions that is needed for connectivity tracing. Rather than generating a comprehensive global model containing all possible information, it extracts the minimal necessary data for the specific purpose of tracing, significantly reducing processing time while maintaining tracing accuracy.
4Reliability
If bundle adjustment is applied to all image pairs, then overall alignment error is minimized, but device complexity and processing requirements increase
Solution Approach 1:
The patent segments the bundle adjustment process into independent local adjustments for each overlap region between adjacent images. Instead of applying bundle adjustment globally to all image pairs simultaneously, it performs localized adjustments that are computationally simpler. The segmentation allows parallel processing of multiple overlap regions, reducing overall processing complexity while maintaining cumulative alignment reliability.
Data Source
AI summary
A schematic diagram detailing a circuit that was reverse engineered from a plurality of images taken of the circuit is provided. The schematic diagram includes at least one circuit element that was represented as an object in at least one of the plurality of images, such that signal continuity information was determined through local tracing of connectivity between a first image and a second image of the plurality of images. A method of tracing the connectivity within the plurality of images to produce the schematic diagram is also disclosed.