Local Contact Resistance for 3D Memory Cell Write Speed
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Solution Overview
Problem
There is a need to improve the write speed in non-volatile memory devices utilizing reversible resistance-change materials, as high voltage is typically required for setting but is more challenging to reset the memory cell effectively.
Innovation Solution
Incorporating a local contact resistance established by a junction between a semiconductor and a metal layer, which reduces the effective voltage across the memory cell during switching, allowing for faster programming while minimizing energy discharge and facilitating easier resetting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high voltage is applied to reduce set time, then write speed is improved, but reset capability deteriorates
Solution Approach 1:
The patent introduces a local contact resistance element as an intermediary component between the voltage source and the memory cell. This mediator limits the current flow during write operations, enabling fast switching without the need for excessive voltage that would harm reset capability. The local contact resistance acts as a buffer that protects the memory cell from voltage-induced damage while still allowing sufficient current for switching.
Solution Approach 2:
The patent modifies the electrical parameters at the contact interface by introducing controlled resistance. This parameter change localizes the voltage drop and current limitation function, allowing the memory cell to experience appropriate switching conditions without being subjected to harmful high voltage levels. The parameter modification enables decoupling of write speed optimization from reset capability degradation.
2Loss of time
If high voltage is applied to improve programming speed, then set time is reduced, but energy discharge increases
Solution Approach 1:
The patent applies the local quality principle by concentrating the voltage drop and energy dissipation in a specific location - the local contact resistance element - rather than allowing excessive energy discharge throughout the entire memory cell. This localized approach enables fast programming by providing the necessary voltage surge only where needed, while protecting the rest of the memory cell from energy-related damage.
Solution Approach 2:
The local contact resistance serves as an intermediary that controls and limits energy discharge during programming operations. It allows sufficient current flow to achieve fast switching while preventing excessive energy from reaching and potentially damaging the memory cell, thus resolving the contradiction between programming speed and energy conservation.
3Speed
If high voltage is used for setting, then write speed improves, but device complexity increases
Solution Approach 1:
The patent changes the electrical parameters at the contact interface by introducing controlled resistance, which fundamentally alters how voltage and current are distributed in the device. This parameter modification enables the system to achieve fast write speeds through controlled current limiting rather than uncontrolled high voltage application, thereby improving performance without proportionally increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster write times while preventing excessive energy discharge, thereby improving the reset capability of memory cells, enhancing overall memory device performance.
Implementation Method 1
Incorporating a local contact resistance established by a junction between a semiconductor and a metal layer, which reduces the effective voltage across the memory cell during switching
Data Source
AI summary
A memory device in a 3-D read and write memory includes a resistance-changing layer, and a local contact resistance in series with, and local to, the resistance-changing layer. The local contact resistance is established by a junction between a semiconductor layer and a metal layer. Further, the local contact resistance has a specified level of resistance according to a doping concentration of the semiconductor and a barrier height of the junction. A method for fabricating such a memory device is also presented.