Local Decoders in Memory Array Structure
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Solution Overview
Problem
Existing array structures in memory devices face challenges in reducing circuit size and RC delays due to complex decoding/selection circuits.
Innovation Solution
The array structure incorporates local decoders at intersections of signal lines, where the word line selection directly controls the local decoders, eliminating the need for additional decoding circuits and reducing circuit complexity and size by sharing signal lines across sub-arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional decoding control circuits are used to select local decoders, then decoding accuracy is improved, but circuit size and complexity increase
Solution Approach 1:
The local decoder automatically activates when its corresponding word line is selected, eliminating the need for separate decoding control circuits. The word line signal directly controls the local decoder activation, making the system self-servicing and reducing overall circuit complexity while maintaining decoding accuracy.
Solution Approach 2:
The word line serves dual functions: it selects the specific memory row and simultaneously activates the corresponding local decoder. This multi-functionality eliminates the need for dedicated decoder selection circuits, reducing circuit complexity while maintaining precise decoding control.
2Measurement precision
If additional decoding control circuits are used to select local decoders, then decoding accuracy is improved, but RC delays increase
Solution Approach 1:
The local decoder responds directly to the word line selection signal without requiring additional decoding control stages. This direct response mechanism eliminates extra RC delay stages while maintaining accurate decoding, as the local decoder activates simultaneously with the word line selection.
3Adaptability or versatility
If local decoders are implemented at each intersection, then decoding capability is improved, but circuit size increases
Solution Approach 1:
Local decoders are strategically placed only at intersections where they are automatically activated by word line selections, providing decoding capability exactly where needed without redundant circuits. This targeted approach maintains high decoding capability while minimizing overall circuit size.
4Measurement precision
If complex decoding circuits are used, then decoding accuracy is improved, but power consumption increases
Solution Approach 1:
The local decoder activates automatically when its corresponding word line is selected, eliminating the need for additional active decoding control circuits. This self-activating mechanism maintains accurate decoding while minimizing power consumption by keeping decoder selection circuits inactive or in high-impedance states during non-selection periods.
Data Source
AI summary
An array structure includes: a plurality of first signal lines and a plurality of sub-arrays. Each of the sub-array includes: a second signal line, a plurality of third signal lines, a plurality of fourth signal lines, a plurality of local decoders at each intersection of the first signal lines, the second signal line and the third signal lines; and a plurality of array cells at each intersection of the first signal lines, the third signal lines and the fourth signal lines. Respective control terminals of the local decoders are implemented by the first signal lines. In response to a selection status of the first signal lines and the second signal line, one of the local decoders selects one of the third signal lines.