Self-Aligned Local Interconnects via Common Cut Mask
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Solution Overview
Problem
Conventional self-aligned contact schemes for semiconductor manufacturing require multiple masks, leading to non-zero overlay variations and difficulties in forming L-shaped contact structures, which are challenging as transistor dimensions shrink, especially for future technology nodes where sidewall image transfer or directional self-assembly are less effective.
Innovation Solution
A method is employed to form local interconnect structures self-aligned to gate structures using a common patterning step that creates parallel lines with constant spacing, followed by a cut mask and lithography to define gate and local interconnect patterns, ensuring zero overlay variation, and using damascene processing to make the top surfaces of both structures coplanar.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional self-aligned contact schemes are used, then contact structures can be formed with alignment to gate structures, but non-zero overlay variations occur due to multiple masks
Solution Approach 1:
The patent merges the patterning of gate structures and local interconnect structures into a single common patterning step. Parallel lines are formed with constant spacing that simultaneously defines both gate and local interconnect patterns, eliminating the need for separate masks and achieving zero overlay variation between the two structure types.
Solution Approach 2:
The patent creates a universal patterning approach where the same parallel line structure serves dual purposes: defining gate structures in one direction and local interconnect structures in another direction. This multi-functional pattern formation eliminates the need for separate patterning steps for different structure types.
2Area of stationary object
If L-shaped contact structures are used to minimize area, then device area is reduced, but printing becomes difficult and multiple exposures are required
Solution Approach 1:
The patent segments the contact structure formation into two separate components: contact structures that connect to source/drain regions and local interconnect structures that run parallel to gate structures. Both are formed as straight line segments rather than L-shaped structures, simplifying the printing process while maintaining area efficiency through optimized layout.
Solution Approach 2:
Instead of forming L-shaped structures that require multiple exposures, the patent inverts the approach by forming separate straight line structures (contact structures and local interconnects) that are positioned adjacent to each other. This inverted approach uses simpler single-exposure patterning while achieving the same functional result.
3Manufacturing precision
If parallel lines with constant spacing are formed using common patterning, then zero overlay variation is achieved, but the process requires sophisticated lithography or sidewall image transfer
Solution Approach 1:
The patent employs sidewall image transfer where sacrificial mandrels are first formed, then sidewalls are deposited on these mandrels. The sidewalls themselves serve as the final pattern definition, automatically creating parallel lines with constant spacing. This self-service mechanism eliminates the need for complex alignment processes while achieving zero overlay variation.
Solution Approach 2:
The patent performs preliminary formation of sacrificial mandrels with constant spacing before the actual pattern transfer. This preliminary action establishes the precise geometric framework that subsequent sidewall deposition will replicate, ensuring zero overlay variation is built into the structure from the outset rather than achieved through complex alignment.
Data Source
AI summary
A common cut mask is employed to define a gate pattern and a local interconnect pattern so that local interconnect structures and gate structures are formed with zero overlay variation relative to one another. A local interconnect structure may be laterally spaced from a gate structure in a first horizontal direction, and contact another gate structure in a second horizontal direction that is different from the first horizontal direction. Further, a gate structure may be formed to be collinear with a local interconnect structure that adjoins the gate structure. The local interconnect structures and the gate structures are formed by a common damascene processing step so that the top surfaces of the gate structures and the local interconnect structures are coplanar with each other.