Double-Sided Local Interconnect for Low-CTE Semiconductor Packaging
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving high integration density and reliable communication bandwidth between integrated circuit dies due to warpage mismatch and coefficient of thermal expansion (CTE) mismatch between package structures, which are exacerbated by the need for interposers and adhesives in traditional packaging techniques.
Innovation Solution
The implementation of a double-sided local interconnect component embedded in a redistribution structure, which provides electrical connections between integrated circuit dies without adhesives, reducing the need for interposers and minimizing CTE mismatch, thereby enhancing communication bandwidth and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional packaging techniques with interposers and adhesives are used, then electrical connections between integrated circuit dies are established, but warpage mismatch and CTE mismatch occur, reducing reliability and communication bandwidth
Solution Approach 1:
The patent removes adhesives and interposers from the package structure, extracting the problematic elements that cause warpage mismatch and CTE mismatch. The local interconnect component directly couples integrated circuit dies without these intermediate materials, eliminating the source of reliability issues while maintaining electrical connectivity.
Solution Approach 2:
The patent merges the interconnect function and the substrate function into a single local interconnect component. This component provides both mechanical support and electrical connection, eliminating the need for separate adhesives and interposers, thereby reducing device complexity and improving reliability.
2Strength
If adhesives are used to attach integrated circuit dies, then mechanical bonding is achieved, but adhesive-related issues and warpage mismatch occur, enlarging the reliability window
Solution Approach 1:
The patent extracts adhesives from the package structure, eliminating the source of adhesive-related issues. The local interconnect component provides direct mechanical and electrical coupling between integrated circuit dies without relying on adhesive materials, thereby improving reliability while maintaining mechanical bonding strength.
3Productivity
If interposers are used for electrical connections, then bandwidth is provided, but CTE mismatch occurs, reducing communication reliability
Solution Approach 1:
The patent merges the interconnect and substrate functions into a single local interconnect component with matching CTE properties. This integrated structure provides the necessary communication bandwidth while eliminating CTE mismatch, thereby improving communication reliability between stacked semiconductor packages.
4Productivity
If minimum feature size is reduced to increase integration density, then more components are integrated into a given area, but packaging complexity increases
Solution Approach 1:
The patent segments the package structure into modular units with local interconnect components that can be stacked vertically. This segmentation approach allows high integration density through increased component count in a given area while maintaining manageable packaging complexity through standardized, repeatable module design.
Data Source
AI summary
A semiconductor structure includes a first redistribution structure, a first local interconnect component disposed on the first redistribution structure, and a first interconnect structure over a second side of the first local interconnect component. The first local interconnect component includes a first plurality of redistribution layers. The first plurality of redistribution layers includes a first plurality of conductive features on a first side of the first local interconnect component. Each of the first plurality of conductive features are coupled to respective conductive features of the first redistribution structure. The first interconnect structure includes a second plurality of conductive features and a third plurality of conductive features. The second plurality of conductive features are electrically coupled to the third plurality of conductive features through the first local interconnect component.