Local Interconnect Planarization via Field Oxide Elevation
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Solution Overview
Problem
Forming reliable local interconnects between integrated circuit components at different elevations on semiconductor substrates is challenging due to the difficulty in patterning conductive lines over varying outer elevations, particularly when the differences are in the range of thousands of Angstroms.
Innovation Solution
The method involves growing field oxide in one circuitry area and etching it, forming dielectric material with conductive contacts, and then removing portions to achieve a more planar surface, allowing for the formation of local interconnects by patterning photoresist and etching back to create a planar surface for electrical connections between components at different elevations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive lines are patterned over varying outer elevations, then local interconnects can be formed between components at different elevations, but the patterning becomes difficult when elevation differences are in the range of thousands of Angstroms
Solution Approach 1:
The patent introduces an intermediate dimension by forming a planarized dielectric layer between the uneven substrate surface and the conductive interconnect layer. This intermediate layer transforms the three-dimensional elevation problem into a two-dimensional planar patterning problem, allowing standard photolithography to be used without being affected by substrate height variations
Solution Approach 2:
The patent uses a dielectric material as an intermediary substance that fills the elevation gaps between components at different heights. This intermediary layer provides a uniform planar surface that mediates between the uneven substrate topology and the requirement for precise conductive line patterning
2Ease of manufacture
If field oxide is grown in one circuitry area and etched, then selective elevation differences are created, but additional processing steps are required to achieve planarity
Solution Approach 1:
The patent performs preliminary elevation differentiation by growing and etching field oxide before forming the final interconnect structures. This preliminary action creates the necessary topography early in the fabrication process, allowing subsequent layers to be formed on a pre-defined elevation landscape
Solution Approach 2:
The patent changes the physical-chemical parameters of the substrate surface by growing field oxide (changing material composition) and then selectively etching it (changing surface topology). These parameter changes create permanent elevation differences that define different circuitry areas without requiring continuous active control
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of reliable local interconnects with improved planarity, facilitating effective electrical connections between circuit components at varying elevations, thereby addressing the challenge of varying substrate heights in integrated circuit fabrication.
Implementation Method 1
field oxide is grown within bulk semiconductive material in a first circuitry area
Implementation Method 2
The field oxide is etched from the first circuitry area
Implementation Method 3
Semiconductive material is epitaxially grown outwardly from the exposed second circuitry area
Implementation Method 4
The photoresist is exposed to such radiation
Data Source
AI summary
In one implementation, field oxide is grown within bulk semiconductive material in a first circuitry area and not over immediately adjacent bulk semiconductive material in a second circuitry area. The field oxide is etched from the first circuitry area. After the etching, a circuit component is formed in the first circuitry area and a circuit component is formed in the second circuitry area. Dielectric material is formed over the first and second circuitry areas. The dielectric material comprises a conductive contact extending outwardly from the circuit component in the first circuitry area. The dielectric material has a first outermost surface. A portion of the dielectric material and a portion of the conductive contact are removed to form a second outermost surface of the dielectric material which has greater degree of planarity than did the first outermost surface. Other aspects are contemplated.