Local Interconnect Structure Sidewall Spacer Patterning
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Solution Overview
Problem
As semiconductor devices shrink, the optical proximity effect (OPE) during double patterning methods leads to undesirable connections and deformation in L-shaped local interconnect structures, resulting in inaccurate patterns and potential leakage or failure of semiconductor devices.
Innovation Solution
A method involving the formation of a dielectric layer on a semiconductor substrate, with a first film layer defining a region for the interconnect structure, a sidewall spacer surrounding it, and a second film layer with a top surface flush to the spacer, allowing for precise etching and filling with a conductive material to create accurate local interconnect structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If double patterning method is used to form L-shaped local interconnect structure, then the optical proximity effect can be reduced, but the structure may still have large deformation and inaccurate pattern
Solution Approach 1:
The patent segments the formation process into multiple stages: first forming a mandrel pattern, then using it as a template to create the final interconnect structure. This segmentation allows each stage to be optimized independently, reducing cumulative deformation and improving pattern accuracy while ensuring device functionality.
Solution Approach 2:
The patent performs preliminary actions by first forming the mandrel structure and using it as a template before creating the final interconnect pattern. This preliminary mandrel formation establishes precise geometric constraints that guide subsequent etching and material deposition, ensuring accurate pattern transfer and reducing deformation.
2Productivity
If critical dimensions are shrunk to decrease technology node, then the pitch between adjacent patterns decreases, but optical proximity effect causes undesirable connections between patterns
Solution Approach 1:
The patent transitions from direct planar patterning to a multi-dimensional approach by forming vertical mandrel structures and using sidewall spacers. This adds the vertical dimension to the patterning process, allowing pitch reduction in the horizontal plane while maintaining pattern separation through vertical spacer structures that prevent optical proximity effects.
Solution Approach 2:
The patent introduces mandrels as intermediary structures that mediate between the lithography process and the final interconnect pattern. These mandrels serve as temporary templates that enable precise pattern formation at reduced pitches by acting as physical barriers and geometric constraints during subsequent processing steps.
3Reliability
If L-shaped local interconnect structure is formed with deformation, then leakage current may occur or device may fail, but conventional methods cannot prevent this deformation
Solution Approach 1:
The patent applies beforehand cushioning by forming protective mandrel structures and using precise etching masks that prevent deformation during the interconnect formation process. These preliminary structures cushion against process variations and prevent the formation of defective L-shaped patterns that would cause leakage or device failure.
Data Source
AI summary
Local interconnect structures and fabrication methods are provided. A dielectric layer can be formed on a semiconductor substrate. A first film layer can be patterned on the dielectric layer to define a region surrounded by a local interconnect structure to be formed. A sidewall spacer can be formed and patterned surrounding the first film layer on an exposed surface portion of the dielectric layer. A second film layer can be formed on the exposed surface portion of the dielectric layer and can have a top surface substantially flushed with a top surface of the sidewall spacer. The patterned sidewall spacer can be removed to form a first opening. After forming the first opening, the dielectric layer can be etched to form a second opening through the dielectric layer. The second opening can be filled with a conductive material to form the local interconnect structure.