Local Memory Buffer Circuit for Row Conflict Latency
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Solution Overview
Problem
Modern memory devices face latency issues due to row or page conflicts, which occur when precharging a currently active row to activate another row, leading to increased cycle usage and memory device latency.
Innovation Solution
Incorporating buffer circuitry within the memory device to store data associated with a first active row of memory cells, while sense amplifier circuitry reads data from a second row of memory cells, allowing data from multiple rows to be accessed without causing a row or page conflict.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a row of memory cells is precharged to activate another row, then the memory device can access different rows, but the latency increases due to the additional precharge cycle
Solution Approach 1:
The buffer circuitry pre-loads and stores data from a first row before the sense amplifier finishes reading the second row. This preliminary action allows the data to be ready for immediate output when needed, eliminating the need to wait for the precharge cycle to complete before accessing the first row's data again.
Solution Approach 2:
The buffer circuitry acts as an intermediary between the sense amplifier and the output. It temporarily holds data from the first row while the sense amplifier reads the second row, mediating the conflict between these two operations and allowing them to proceed simultaneously without interference.
2Productivity
If data from multiple rows is accessed simultaneously, then memory device performance is enhanced, but row or page conflicts occur without buffer circuitry
Solution Approach 1:
The buffer circuitry serves as an intermediary that decouples the sense amplifier operation from the output operation. By storing data from the first row in the buffer, it allows the sense amplifier to read the second row simultaneously without causing conflicts, enabling reliable multi-row access.
Solution Approach 2:
The data path is segmented into separate stages: the sense amplifier stage for reading from memory cells, the buffer stage for temporary storage, and the output stage for data delivery. This segmentation allows different rows to be processed at different stages simultaneously, improving productivity while maintaining reliability.
Data Source
AI summary
A system and technique for buffering data locally within a memory device to allow access to data associated with multiple different rows within the memory device. The memory device includes memory bank circuitry having memory cells and sense amplifier circuitry coupled to the memory bank circuitry. The memory device further includes buffer circuitry coupled to an output of the sense amplifier circuitry. Further, the memory device includes selection circuitry. The selection circuitry receives a first data signal from the sense amplifier circuitry and a second data signal from the buffer circuitry, and outputs a selected one of the first data signal and the second data signal.