Local Memory Manager for Flash Data Relocation

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Solution Overview

Problem

Flash memory devices face challenges in extending their lifetime due to wear and programming errors, as well as data loss during erase operations, which can lead to reduced performance and reliability.

Innovation Solution

A local memory manager component is introduced to optimize data relocation within memory regions by using predetermined criteria such as erase block fullness, wear levels, and error flags, allowing for independent data management and relocation, thereby reducing the load on the memory controller and enhancing data integrity and device longevity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If data is relocated frequently to extend flash memory lifetime, then device longevity is improved, but programming errors and data loss during erase operations increase

Engineering Contradiction:
Improvedevice longevityVSAvoidprogramming errors
Core Design Contradiction:
Duration of action of stationary objectVSReliability

Solution Approach 1:

The system performs preliminary actions by identifying and relocating data before erase operations are needed. The memory manager proactively moves valid data out of erase blocks that are candidates for erasure, preventing data loss before it occurs. This preliminary data relocation reduces the frequency of emergency relocations later, thereby extending device longevity while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory manager implements feedback mechanisms by monitoring the state of erase blocks and adjusting data relocation decisions based on observed patterns. By tracking which blocks are being erased and which data is being moved, the system learns to optimize relocation timing and targets, reducing unnecessary operations that could introduce programming errors while still extending device life.

Inventive Principle:
Principle #23Feedback

2Reliability

If data relocation is performed to reduce margin loss during erase operations, then programming reliability is improved, but device complexity increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory manager component implements self-service by autonomously monitoring erase block states and performing data relocation without external intervention. This self-managing approach consolidates complexity into a dedicated software layer rather than requiring complex hardware circuitry, thereby improving programming reliability through consistent margin management while keeping the overall device design relatively simple.

Inventive Principle:
Principle #25Self-service

3Reliability

If a local memory manager component is introduced to manage data relocation, then data integrity is improved, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory management function is segmented into a dedicated local memory manager component that operates independently from the main memory controller. This segmentation isolates the complexity of data integrity management into a specialized subsystem, allowing the rest of the device to remain simple while achieving improved data integrity through focused, dedicated management of relocation operations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11609847B2Relocating data in a memory device
Publication Date: 2023.03.21 MONTEREY RESEARCH LLC
  • US11609847B2 patent drawing
  • US11609847B2 patent drawing
  • US11609847B2 patent drawing

AI summary

Methods that can facilitate more optimized relocation of data associated with a memory are presented. In addition to a memory controller component, a memory manager component can be employed to increase available processing resources to facilitate more optimal execution of higher level functions. Higher level functions can be delegated to the memory manager component to allow execution of these higher level operations with reduced or no load on the memory controller component resources. A uni-bus or multi-bus architecture can be employed to further optimize data relocation operations. A first bus can be utilized for data access operations including read, write, erase, refresh, or combinations thereof, among others, while a second bus can be designated for higher level operations including data compaction, error code correction, wear leveling, or combinations thereof, among others.