Local Power Manager for SoC State Transitions
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Solution Overview
Problem
Current power management systems for System on a Chip (SoC) face limitations in flexibility and debugging capabilities due to either hardware-based state machines, which offer fast but inflexible transitions, or micro-controller based solutions, which provide flexibility but result in longer transitions and increased silicon area usage.
Innovation Solution
Implementing local power managers that execute custom, small-sized instructions for power state transitions, allowing for faster and more flexible management while maintaining a small silicon area footprint, enabling independent control of multiple devices and post-silicon modification capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a state machine based solution is used for power management, then fast state transitions are achieved, but flexibility for modification and debugging is limited
Solution Approach 1:
The power management system is segmented into multiple independent local power managers, each responsible for specific devices or subsystems. Each local power manager contains its own power sequencer and instruction memory, allowing independent operation and modification without affecting the entire system. This segmentation enables both fast hardware-level transitions and software-level flexibility.
Solution Approach 2:
A power sequencer acts as an intermediary component that executes custom instructions to control power state transitions. The power sequencer receives triggering events and executes sequences of operations to transition devices between power states. This intermediary approach combines the speed of hardware control with the flexibility of programmable instruction execution.
2Adaptability or versatility
If a micro-controller based solution is used for power management, then flexibility for modification and debugging is improved, but state transition time increases and silicon area consumption increases
Solution Approach 1:
The essential power management functionality is extracted from a generic micro-controller into dedicated local power managers. Each local power manager contains only the necessary components (power sequencer, instruction memory, trigger logic) to perform power state transitions, removing unnecessary features like large data memory, mathematical operations, and complex debug infrastructure that consume silicon area and slow down transitions.
Solution Approach 2:
The instruction memory size and complexity parameters are changed to be minimal and specific to power management tasks. Instead of using a generic micro-controller with large memory and full computational capabilities, the system uses compact instruction sequences tailored specifically for power state transitions, achieving fast execution with reduced silicon footprint.
3Adaptability or versatility
If a micro-controller based solution is used for power management, then flexibility for modification is improved, but silicon area consumption increases
Solution Approach 1:
Multiple local power managers share common resources such as instruction memory and data memory through a memory management unit. This merging approach allows each local power manager to have its own instruction set for flexibility while sharing the underlying hardware resources, significantly reducing the total silicon area compared to having separate dedicated memory for each manager.
Solution Approach 2:
The local power managers use a universal instruction set architecture that can handle various power management tasks across different devices and subsystems. This multi-functionality allows a single local power manager to manage multiple devices, reducing the number of instances needed and thereby reducing overall silicon area consumption while maintaining flexibility.
Data Source
AI summary
Methods, systems, and apparatus for handling applications in an ambient computing system. One of the apparatus includes multiple devices arranged in multiple power blocks, wherein each device of the multiple devices belongs to one of the multiple power blocks; and multiple local power managers, each local power manager being programmable to execute respective sets of instruction sequences for a respective power block in order to effectuate power state transitions for one or more devices in the respective power block.