Local Rollback Using Multi-Versioned L2 Cache in Parallel Computing

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Solution Overview

Problem

Highly parallel computing systems face challenges in reducing the frequency of checkpoints due to the time-consuming process of writing node states to disk and the increasing soft error rate, which can lead to reduced mean-time-to-failure and system crashes, especially in HPC environments.

Innovation Solution

The implementation of a multi-versioned memory system, specifically utilizing the Level 2 (L2) cache on the BlueGene/Q supercomputer, which supports speculative running and transactional memory, allows for local rollbacks by managing multiple versions of data and enabling speculative data to be written back to main memory, thereby reducing the need for complete checkpoints.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If periodic checkpoints are performed to improve reliability, then fault tolerance is improved, but checkpoint time increases and productivity decreases

Engineering Contradiction:
Improvefault toleranceVSAvoidcheckpoint time
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the checkpoint process into two distinct types: local checkpoints that capture only the state of individual nodes with failures, and global checkpoints that capture the state of the entire system. This segmentation allows the system to perform frequent, lightweight local checkpoints without the overhead of full system-wide checkpoints, thereby improving fault tolerance while minimizing productivity loss.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements partial checkpointing by only checkpointing the state of nodes that have experienced failures rather than performing complete system checkpoints. This partial action approach reduces the amount of data that needs to be saved and restored, significantly decreasing checkpoint time while maintaining adequate fault tolerance through targeted recovery.

Inventive Principle:
Principle #16Partial or excessive action

2Productivity

If the number of nodes is increased to improve computing power, then productivity is improved, but reliability deteriorates due to increased soft error probability

Engineering Contradiction:
Improvecomputing powerVSAvoidmean-time-to-failure
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides the large parallel computing system into independent node units that can be individually monitored and recovered. Each node maintains its own state information and can perform local checkpoints independently, allowing the system to scale to many nodes while maintaining reliability through granular fault isolation and recovery at the node level.

Inventive Principle:
Principle #1Segmentation

3Reliability

If complete checkpoints are performed to ensure system recovery, then reliability is improved, but loss of time increases due to full system state saving

Engineering Contradiction:
Improvesystem recoveryVSAvoidcheckpoint duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and separates the checkpoint operation from being a monolithic system-wide process. Instead, it extracts checkpointing to the individual node level, allowing each node to save its own state independently. This extraction eliminates the need for coordinated system-wide checkpointing, significantly reducing the time required while ensuring that failed nodes can be recovered with their specific state information.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs partial checkpoints that capture only the necessary state information for failed nodes rather than complete system states. This partial action approach reduces checkpoint duration by focusing resources on saving only the critical data needed for recovery, rather than performing exhaustive system-wide state captures.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20110119526A1Local rollback for fault-tolerance in parallel computing systems
Publication Date: 2011.05.19 MEDIATEK INC
  • US20110119526A1 patent drawing
  • US20110119526A1 patent drawing
  • US20110119526A1 patent drawing

AI summary

A control logic device performs a local rollback in a parallel super computing system. The super computing system includes at least one cache memory device. The control logic device determines a local rollback interval. The control logic device runs at least one instruction in the local rollback interval. The control logic device evaluates whether an unrecoverable condition occurs while running the at least one instruction during the local rollback interval. The control logic device checks whether an error occurs during the local rollback. The control logic device restarts the local rollback interval if the error occurs and the unrecoverable condition does not occur during the local rollback interval.